Texas Instruments

The TPS728xx series of low-dropout linear regulators (LDOs), with a selectable dual-voltage level output, is designed specially for applications that require two levels of output voltage regulation. Programming fuses and memory cards, reducing leakage effects, and conserving power in nanometric processes are some application examples. The VSET pin is used to select one of two output voltage levels preset through innovative factory EEPROM programming. A precision bandgap and error amplifier provides an overall 3% accuracy over load, line, and temperature extremes. Ultra-small wafer chip scale (WCSP) and 2mm x 2mm SON packages make the TPS728xx series ideal for handheld applications. This family of devices is fully specified over a temperature range of TJ= -40°C to +125°C. The TPS728xx series of low-dropout linear regulators (LDOs), with a selectable dual-voltage level output, is designed specially for applications that require two levels of output voltage regulation. Programming fuses and memory cards, reducing leakage effects, and conserving power in nanometric processes are some application examples. The VSET pin is used to select one of two output voltage levels preset through innovative factory EEPROM programming. A precision bandgap and error amplifier provides an overall 3% accuracy over load, line, and temperature extremes. Ultra-small wafer chip scale (WCSP) and 2mm x 2mm SON packages make the TPS728xx series ideal for handheld applications. This family of devices is fully specified over a temperature range of TJ= -40°C to +125°C.

The TPS73xx devices are members of a family of micropower low-dropout (LDO) voltage regulators. They are differentiated from the TPS71xx and TPS72xx LDOs by their integrated delayed microprocessor-reset function. If the precision delayed reset is not required, the TPS71xx and TPS72xx should be considered. The RESET\ output of the TPS73xx initiates a reset in microcomputer and microprocessor systems in the event of an undervoltage condition. An internal comparator in the TPS73xx monitors the output voltage of the regulator to detect an undervoltage condition on the regulated output voltage. If that occurs, the RESET\ output (open-drain NMOS) turns on, taking the RESET\ signal low. RESET\ stays low for the duration of the undervoltage condition. Once the undervoltage condition ceases, a 200-ms (typ) time-out begins. At the completion of the 200-ms delay, RESET\ goes high. An order of magnitude reduction in dropout voltage and quiescent current over conventional LDO performance is achieved by replacing the typical pnp pass transistor with a PMOS device. Because the PMOS device behaves as a low-value resistor, the dropout voltage is very low (maximum of 35mV at an output current of 100 mA for the TPS7350) and is directly proportional to the output current (see Figure1). Additionally, since the PMOS pass element is a voltage-driven device, the quiescent current is low and remains constant, independent of output loading (typically 340 uA over the full range of output current, 0 mA to 500mA). These two key specifications yield a significant improvement in operating life for battery-powered systems. The LDO family also features a sleep mode; applying a logic high signal to EN\ (enable\) shuts down the regulator, reducing the quiescent current to 0.5 uA maximum at TJ= 25°C. The TPS73xx is offered in 2.5-V, 3-V, 3.3-V, 4.85-V, and 5-V fixed-voltage versions and in an adjustable version (programmable over the range of 1.2 V to 9.75 V). Output voltage tolerance is specified as a maximum of 2% over line, load, and temperature ranges (3% for the 2.5 V and the adjustable version). The TPS73xx family is available in PDIP (8 pin), SO (8 pin) and TSSOP (20 pin) packages. The TSSOP has a maximum height of 1.2mm. The TPS73xx devices are members of a family of micropower low-dropout (LDO) voltage regulators. They are differentiated from the TPS71xx and TPS72xx LDOs by their integrated delayed microprocessor-reset function. If the precision delayed reset is not required, the TPS71xx and TPS72xx should be considered. The RESET\ output of the TPS73xx initiates a reset in microcomputer and microprocessor systems in the event of an undervoltage condition. An internal comparator in the TPS73xx monitors the output voltage of the regulator to detect an undervoltage condition on the regulated output voltage. If that occurs, the RESET\ output (open-drain NMOS) turns on, taking the RESET\ signal low. RESET\ stays low for the duration of the undervoltage condition. Once the undervoltage condition ceases, a 200-ms (typ) time-out begins. At the completion of the 200-ms delay, RESET\ goes high. An order of magnitude reduction in dropout voltage and quiescent current over conventional LDO performance is achieved by replacing the typical pnp pass transistor with a PMOS device. Because the PMOS device behaves as a low-value resistor, the dropout voltage is very low (maximum of 35mV at an output current of 100 mA for the TPS7350) and is directly proportional to the output current (see Figure1). Additionally, since the PMOS pass element is a voltage-driven device, the quiescent current is low and remains constant, independent of output loading (typically 340 uA over the full range of output current, 0 mA to 500mA). These two key specifications yield a significant improvement in operating life for battery-powered systems. The LDO family also features a sleep mode; applying a logic high signal to EN\ (enable\) shuts down the regulator, reducing the quiescent current to 0.5 uA maximum at TJ= 25°C. The TPS73xx is offered in 2.5-V, 3-V, 3.3-V, 4.85-V, and 5-V fixed-voltage versions and in an adjustable version (programmable over the range of 1.2 V to 9.75 V). Output voltage tolerance is specified as a maximum of 2% over line, load, and temperature ranges (3% for the 2.5 V and the adjustable version). The TPS73xx family is available in PDIP (8 pin), SO (8 pin) and TSSOP (20 pin) packages. The TSSOP has a maximum height of 1.2mm.

The TPS730 family of low-dropout (LDO) low-power linear voltage regulators features high power-supply rejection ratio (PSRR), low noise, fast start-up, and excellent line and load transient responses in a small SOT-23 package. NanoStar packaging gives an ultrasmall footprint as well as an ultralow profile and package weight, making it ideal for portable applications such as handsets and PDAs. Each device in the family is stable, with a small, 2.2-µF ceramic capacitor on the output. The TPS730 family uses an advanced, proprietary BiCMOS fabrication process to yield low dropout voltages (for example, 120 mV at 200 mA, TPS73030). Each device achieves fast start-up times (approximately 50 µs with a 0.001-µF bypass capacitor) while consuming low quiescent current (170 µA typical). Moreover, when the device is placed in standby mode, the supply current is reduced to less than 1 µA. The TPS73018 exhibits approximately 33 µVRMSof output voltage noise at 1.8 V output with a 0.01-µF bypass capacitor. Applications with analog components that are noise-sensitive, such as portable RF electronics, benefit from the high PSRR and low-noise features as well as the fast response time. The TPS730 family of low-dropout (LDO) low-power linear voltage regulators features high power-supply rejection ratio (PSRR), low noise, fast start-up, and excellent line and load transient responses in a small SOT-23 package. NanoStar packaging gives an ultrasmall footprint as well as an ultralow profile and package weight, making it ideal for portable applications such as handsets and PDAs. Each device in the family is stable, with a small, 2.2-µF ceramic capacitor on the output. The TPS730 family uses an advanced, proprietary BiCMOS fabrication process to yield low dropout voltages (for example, 120 mV at 200 mA, TPS73030). Each device achieves fast start-up times (approximately 50 µs with a 0.001-µF bypass capacitor) while consuming low quiescent current (170 µA typical). Moreover, when the device is placed in standby mode, the supply current is reduced to less than 1 µA. The TPS73018 exhibits approximately 33 µVRMSof output voltage noise at 1.8 V output with a 0.01-µF bypass capacitor. Applications with analog components that are noise-sensitive, such as portable RF electronics, benefit from the high PSRR and low-noise features as well as the fast response time.