Texas Instruments

The TMCS1126-Q1 is a galvanically isolated Hall-effect current sensor with industry leading isolation and accuracy. An output voltage proportional to the input current is provided with excellent linearity and low drift at all sensitivity options. Precision signal conditioning circuitry with built-in drift compensation is capable of less than 1.4% maximum sensitivity error over temperature and lifetime with no system level calibration, or less than 0.9% maximum sensitivity error including both lifetime and temperature drift with a one-time calibration at room temperature. AC or DC input current flows through an internal conductor generating a magnetic field measured by integrated, on-chip, Hall-effect sensors. Core-less construction eliminates the need for magnetic concentrators. Differential Hall sensors reject interference from stray external magnetic fields. Low conductor resistance increases measurable current ranges up to ±103A while minimizing power loss and easing thermal dissipation requirements. Insulation capable of withstanding 5kVRMS, coupled with a minimum of 8mm creepage and clearance, provides high levels of reliable lifetime reinforced working voltage. Integrated shielding enables excellent common-mode rejection and transient immunity. Fixed sensitivity allows the device to operate from a single 3V to 5.5V power supply, eliminating ratiometry errors and improving supply noise rejection. TI provides the TMCS1126xxB-Q1 as a lower-cost option. The TMCS1126-Q1 is a galvanically isolated Hall-effect current sensor with industry leading isolation and accuracy. An output voltage proportional to the input current is provided with excellent linearity and low drift at all sensitivity options. Precision signal conditioning circuitry with built-in drift compensation is capable of less than 1.4% maximum sensitivity error over temperature and lifetime with no system level calibration, or less than 0.9% maximum sensitivity error including both lifetime and temperature drift with a one-time calibration at room temperature. AC or DC input current flows through an internal conductor generating a magnetic field measured by integrated, on-chip, Hall-effect sensors. Core-less construction eliminates the need for magnetic concentrators. Differential Hall sensors reject interference from stray external magnetic fields. Low conductor resistance increases measurable current ranges up to ±103A while minimizing power loss and easing thermal dissipation requirements. Insulation capable of withstanding 5kVRMS, coupled with a minimum of 8mm creepage and clearance, provides high levels of reliable lifetime reinforced working voltage. Integrated shielding enables excellent common-mode rejection and transient immunity. Fixed sensitivity allows the device to operate from a single 3V to 5.5V power supply, eliminating ratiometry errors and improving supply noise rejection. TI provides the TMCS1126xxB-Q1 as a lower-cost option.

The TMCS1133 is a galvanically isolated Hall-effect current sensor with industry leading isolation and accuracy. An output voltage proportional to the input current is provided with excellent linearity and low drift at all sensitivity options. Precision signal conditioning circuitry with built-in drift compensation is capable of less than 1.4% maximum sensitivity error over temperature and lifetime with no system level calibration, or less than 0.9% maximum sensitivity error including both lifetime and temperature drift with a one-time calibration at room temperature. AC or DC input current flows through an internal conductor generating a magnetic field measured by integrated, on-chip, Hall-effect sensors. Core-less construction eliminates the need for magnetic concentrators. Differential Hall sensors reject interference from stray external magnetic fields. Low conductor resistance increases measurable current ranges up to ±96A while minimizing power loss and easing thermal dissipation requirements. Insulation capable of withstanding 5kVRMS, coupled with a minimum of 8mm creepage and clearance, provides high levels of reliable lifetime reinforced working voltage. Integrated shielding enables excellent common-mode rejection and transient immunity. Fixed sensitivity allows the device to operate from a single 3V to 5.5V power supply, eliminating ratiometry errors and improving supply noise rejection. The TMCS1133 is a galvanically isolated Hall-effect current sensor with industry leading isolation and accuracy. An output voltage proportional to the input current is provided with excellent linearity and low drift at all sensitivity options. Precision signal conditioning circuitry with built-in drift compensation is capable of less than 1.4% maximum sensitivity error over temperature and lifetime with no system level calibration, or less than 0.9% maximum sensitivity error including both lifetime and temperature drift with a one-time calibration at room temperature. AC or DC input current flows through an internal conductor generating a magnetic field measured by integrated, on-chip, Hall-effect sensors. Core-less construction eliminates the need for magnetic concentrators. Differential Hall sensors reject interference from stray external magnetic fields. Low conductor resistance increases measurable current ranges up to ±96A while minimizing power loss and easing thermal dissipation requirements. Insulation capable of withstanding 5kVRMS, coupled with a minimum of 8mm creepage and clearance, provides high levels of reliable lifetime reinforced working voltage. Integrated shielding enables excellent common-mode rejection and transient immunity. Fixed sensitivity allows the device to operate from a single 3V to 5.5V power supply, eliminating ratiometry errors and improving supply noise rejection.

The TMDS1204 is an HDMI 2.1 redriver supporting data rates up to 12Gbps. It is backwards compatible for HDMI 1.4b and HDMI 2.0b. The high-speed differential inputs and outputs can either be AC-coupled or DC-coupled, which qualifies the TMDS1204 to be used as a DP++ to HDMI level shifter or HDMI redriver. The TMDS1204 can support both 3 and 4 lane HDMI 2.1 FRL at 3, 6, 8, 10, and 12Gbps. The TMDS1204 is a hybrid redriver supporting both source and sink applications. A hybrid redriver can operate either in a linear or limited redriver function. When configured as a limited redriver, the TMDS1204 differential output voltage levels are independent of the graphics process unit (GPU) output levels ensuring HDMI compliant levels at the receptacle. The limited redriver mode is recommended for HDMI source applications. When configured as a linear redriver, the TMDS1204 differential output levels are a linear function of the GPU output levels enabling TMDS1204 to be transparent to link training and operate as a channel shortener. Linear redriver mode is recommended for HDMI sink applications. The TMDS1204 has an integrated HPD level shifter. The HPD level shifter will shift the 5V HPD signal to either 1.8V or 3.3V. The level shifter output can also be configured for push, pull, or open-drain. The integration of the level shifter eliminates discrete solutions and thereby saves system cost. The TMDS1204 supports single power supply rails of 3.3V on VCC and is offered in a commercial temperature (TMDS1204) and industrial temperature (TMDS1204I). The TMDS1204 is an HDMI 2.1 redriver supporting data rates up to 12Gbps. It is backwards compatible for HDMI 1.4b and HDMI 2.0b. The high-speed differential inputs and outputs can either be AC-coupled or DC-coupled, which qualifies the TMDS1204 to be used as a DP++ to HDMI level shifter or HDMI redriver. The TMDS1204 can support both 3 and 4 lane HDMI 2.1 FRL at 3, 6, 8, 10, and 12Gbps. The TMDS1204 is a hybrid redriver supporting both source and sink applications. A hybrid redriver can operate either in a linear or limited redriver function. When configured as a limited redriver, the TMDS1204 differential output voltage levels are independent of the graphics process unit (GPU) output levels ensuring HDMI compliant levels at the receptacle. The limited redriver mode is recommended for HDMI source applications. When configured as a linear redriver, the TMDS1204 differential output levels are a linear function of the GPU output levels enabling TMDS1204 to be transparent to link training and operate as a channel shortener. Linear redriver mode is recommended for HDMI sink applications. The TMDS1204 has an integrated HPD level shifter. The HPD level shifter will shift the 5V HPD signal to either 1.8V or 3.3V. The level shifter output can also be configured for push, pull, or open-drain. The integration of the level shifter eliminates discrete solutions and thereby saves system cost. The TMDS1204 supports single power supply rails of 3.3V on VCC and is offered in a commercial temperature (TMDS1204) and industrial temperature (TMDS1204I).

The TMDS141 HDMI hider is designed to accommodate a 1-m HDMI cable between a HDMI connector and a receiver. The internal cable causes signal distortion to high-speed TMDS signals, as well as increasing capacitance to the DDC channel. Each TMDS141 contains four TMDS repeaters to transmit digital content with signaling rates of up to 2.25-Gbps, and an I2C repeater to link extended display identification data (EDID) reading and high-bandwidth digital content protection (HDCP) key exchange under I2C standard mode operations. The device includes four TMDS compliant differential receivers with 50-Ω termination resistors and 3.3-V termination voltage integrated at each receiver input pin. External terminations are not required. A built-in frequency response equalization circuit, 8 dB at 825 MHz, compensates inter-symbol interference (ISI) losses from a 5-m or longer input cable link. The device also includes four TMDS compliant differential drivers. A precision resistor is connected externally from the VSADJ pin to ground for setting the differential output voltage to be compliant with the TMDS standard. A selectable de-emphasis circuit is available via the PRE input to drive long PCB traces or cables. When PRE is high, the 3.5-dB high frequency gain offsets the losses due to the FR4 trace. PRE can be left open or kept low when the de-emphasis function is not desired. With standard TMDS terminations at the outputs, all TMDS outputs are forced high-impedance whenOEis set high. The I2C repeater isolates the buses without accumulating the capacitance of both sides. It allows DDC capacitance to be controlled under the desired load. The I2C outputs are high-impedance when device supply voltage is less than 1.5 V or I2CEN is low. The OVS pin, output voltage select, provides the flexibility of adjusting the output voltage level of the TSCL and TSDA side to optimize noise margins while interfacing to different HDMI receivers. The device is characterized for operation from 0°C to 70°C. The TMDS141 HDMI hider is designed to accommodate a 1-m HDMI cable between a HDMI connector and a receiver. The internal cable causes signal distortion to high-speed TMDS signals, as well as increasing capacitance to the DDC channel. Each TMDS141 contains four TMDS repeaters to transmit digital content with signaling rates of up to 2.25-Gbps, and an I2C repeater to link extended display identification data (EDID) reading and high-bandwidth digital content protection (HDCP) key exchange under I2C standard mode operations. The device includes four TMDS compliant differential receivers with 50-Ω termination resistors and 3.3-V termination voltage integrated at each receiver input pin. External terminations are not required. A built-in frequency response equalization circuit, 8 dB at 825 MHz, compensates inter-symbol interference (ISI) losses from a 5-m or longer input cable link. The device also includes four TMDS compliant differential drivers. A precision resistor is connected externally from the VSADJ pin to ground for setting the differential output voltage to be compliant with the TMDS standard. A selectable de-emphasis circuit is available via the PRE input to drive long PCB traces or cables. When PRE is high, the 3.5-dB high frequency gain offsets the losses due to the FR4 trace. PRE can be left open or kept low when the de-emphasis function is not desired. With standard TMDS terminations at the outputs, all TMDS outputs are forced high-impedance whenOEis set high. The I2C repeater isolates the buses without accumulating the capacitance of both sides. It allows DDC capacitance to be controlled under the desired load. The I2C outputs are high-impedance when device supply voltage is less than 1.5 V or I2CEN is low. The OVS pin, output voltage select, provides the flexibility of adjusting the output voltage level of the TSCL and TSDA side to optimize noise margins while interfacing to different HDMI receivers. The device is characterized for operation from 0°C to 70°C.

The TMDS171 is a digital video interface (DVI) or high-definition multimedia interface (HDMI) retimer. The TMDS171 supports four TMDS channels, Audio Return Channel (SPDIF_IN/ARC_OUT), Hot Plug Detect (HPD) and Digital Display Control (DDC) interfaces. The TMDS171 supports signaling rates up to 3.4 Gbps to allow for the highest resolutions of 4k2k30p 24 bits per pixel and up to WUXGA 12-bit color depth or 1080p with higher refresh rates. The TMDS171 automatically configures itself as a re-driver at low data rate (< 1 Gbps) or as a re-timer above this data rate. The TMDS171 supports dual power supply rails of 1.2 V on VDD and 3.3 V on VCC for active power reduction. Several methods of power management are implemented to reduce overall power consumption. TMDS171 supports fixed EQ gain or adaptive EQ control by I2C or pin strap to compensate for different lengths input cable or board traces. The TMDS171 is a digital video interface (DVI) or high-definition multimedia interface (HDMI) retimer. The TMDS171 supports four TMDS channels, Audio Return Channel (SPDIF_IN/ARC_OUT), Hot Plug Detect (HPD) and Digital Display Control (DDC) interfaces. The TMDS171 supports signaling rates up to 3.4 Gbps to allow for the highest resolutions of 4k2k30p 24 bits per pixel and up to WUXGA 12-bit color depth or 1080p with higher refresh rates. The TMDS171 automatically configures itself as a re-driver at low data rate (< 1 Gbps) or as a re-timer above this data rate. The TMDS171 supports dual power supply rails of 1.2 V on VDD and 3.3 V on VCC for active power reduction. Several methods of power management are implemented to reduce overall power consumption. TMDS171 supports fixed EQ gain or adaptive EQ control by I2C or pin strap to compensate for different lengths input cable or board traces.

The TMDS250 is a 2-port digital video interface (DVI) or high-definition multimedia interface (HDMI) switch that allows up to 2 DVI or HDMI ports to be switched to a single display terminal. Four TMDS channels, one hot plug detector, and a digital display control (DDC) interface are supported on each port. Each TMDS channel supports signaling rates up to 2.5 Gbps to allow 1080p resolution in 12-bit color depth. The input port is enabled by configuring source selectors, S1 and S2. When an input port is selected, the TMDS inputs are connected to the TMDS outputs through a 2-to-1 multiplexer, the MOSFET between the input DDC channel and the output DDC channel is turned on, and the HPD output follows the state of the HPD_SINK. The other input port is inactive with disconnected input terminations, disconnected TMDS inputs to the outputs, disconnected DDC inputs to the outputs, and the HPD outputs are low state. Check the source selection look up table for the details of port selections. When S1 is high and S2 is low, all input terminations are disconnected, TMDS inputs are high impedance with standard TMDS terminations, all internal MOSFETs are turned off to disable the DDC links, and all HPD outputs are connected to the HPD_SINK. This allows the initiation of the HDMI physical address discovery process. Termination resistors (50-), pulled up to VCC, are integrated at each TMDS receiver input. External terminations are not required. A precision resistor is connected externally from the VSADJ pin to ground for setting the differential output voltage to be compliant with the TMDS standard. The TMDS250 provides two levels of receiver input equalization for different ranges of cable lengths. Each TMDS receiver owns frequency responsive equalization circuits. When EQ sets low, the receiver supports the input connection in short range HDMI cables. When EQ sets high, the receiver supports the input connection in long range HDMI cables. The TMDS250 supports power saving operation. When a system is under standby mode and there is no digital audio/visual content from a connected source, the 3.3-V supply voltage, VCC, can be powered off to minimize power consumption from the TMDS inputs, outputs, and internal switching circuits. The HPD, DDC, and source selection circuits are powered up by the 5-V supply voltage, VDD, to maintain the system hot plug detect response, the DDC link from the selected source to the sink under system standby operation. The device is characterized for operation from 0°C to 70°C. The TMDS250 is a 2-port digital video interface (DVI) or high-definition multimedia interface (HDMI) switch that allows up to 2 DVI or HDMI ports to be switched to a single display terminal. Four TMDS channels, one hot plug detector, and a digital display control (DDC) interface are supported on each port. Each TMDS channel supports signaling rates up to 2.5 Gbps to allow 1080p resolution in 12-bit color depth. The input port is enabled by configuring source selectors, S1 and S2. When an input port is selected, the TMDS inputs are connected to the TMDS outputs through a 2-to-1 multiplexer, the MOSFET between the input DDC channel and the output DDC channel is turned on, and the HPD output follows the state of the HPD_SINK. The other input port is inactive with disconnected input terminations, disconnected TMDS inputs to the outputs, disconnected DDC inputs to the outputs, and the HPD outputs are low state. Check the source selection look up table for the details of port selections. When S1 is high and S2 is low, all input terminations are disconnected, TMDS inputs are high impedance with standard TMDS terminations, all internal MOSFETs are turned off to disable the DDC links, and all HPD outputs are connected to the HPD_SINK. This allows the initiation of the HDMI physical address discovery process. Termination resistors (50-), pulled up to VCC, are integrated at each TMDS receiver input. External terminations are not required. A precision resistor is connected externally from the VSADJ pin to ground for setting the differential output voltage to be compliant with the TMDS standard. The TMDS250 provides two levels of receiver input equalization for different ranges of cable lengths. Each TMDS receiver owns frequency responsive equalization circuits. When EQ sets low, the receiver supports the input connection in short range HDMI cables. When EQ sets high, the receiver supports the input connection in long range HDMI cables. The TMDS250 supports power saving operation. When a system is under standby mode and there is no digital audio/visual content from a connected source, the 3.3-V supply voltage, VCC, can be powered off to minimize power consumption from the TMDS inputs, outputs, and internal switching circuits. The HPD, DDC, and source selection circuits are powered up by the 5-V supply voltage, VDD, to maintain the system hot plug detect response, the DDC link from the selected source to the sink under system standby operation. The device is characterized for operation from 0°C to 70°C.

The TMDS251 is a 2-port digital video interface (DVI) or high-definition multimedia interface (HDMI) switch that allows up to 2 DVI or HDMI ports to be switched to a single display terminal. Four TMDS channels, one hot plug detector, and a digital display control (DDC) interface are supported on each port. Each TMDS channel supports signaling rates up to 2.5 Gbps to allow 1080p resolution in 12-bit color depth. The input port is enabled by configuring source selectors, S1 and S2. When an input port is selected, the TMDS inputs are connected to the TMDS outputs through a 2-to-1 multiplexer, the MOSFET between the input DDC channel and the output DDC channel is turned on, and the HPD output follows the state of the HPD_SINK. The other input port is inactive with disconnected input terminations, disconnected TMDS inputs to the outputs, disconnected DDC inputs to the outputs, and the HPD outputs are low state. Check the source selection look up table for the details of port selections. When S1 is high and S2 is low, all input terminations are disconnected, TMDS inputs are high impedance with standard TMDS terminations, all internal MOSFETs are turned off to disable the DDC links, and all HPD outputs are connected to the HPD_SINK. This allows the initiation of the HDMI physical address discovery process. Termination resistors (50-Ω), pulled up to VCC, are integrated at each TMDS receiver input. External terminations are not required. A precision resistor is connected externally from the VSADJ pin to ground for setting the differential output voltage to be compliant with the TMDS standard. The TMDS251 provides two levels of receiver input equalization for different ranges of cable lengths. Each TMDS receiver owns frequency responsive equalization circuits. When EQ sets low, the receiver supports the input connection in short range HDMI cables. When EQ sets high, the receiver supports the input connection in long range HDMI cables. The TMDS251 supports power saving operation. When a system is under standby mode and there is no digital audio/visual content from a connected source, the 3.3-V supply voltage, VCC, can be powered off to minimize power consumption from the TMDS inputs, outputs, and internal switching circuits. The HPD, DDC, and source selection circuits are powered up by the 5-V supply voltage, VDD, to maintain the system hot plug detect response, the DDC link from the selected source to the sink under system standby operation. The device is characterized for operation from 0°C to 70°C. The TMDS251 is a 2-port digital video interface (DVI) or high-definition multimedia interface (HDMI) switch that allows up to 2 DVI or HDMI ports to be switched to a single display terminal. Four TMDS channels, one hot plug detector, and a digital display control (DDC) interface are supported on each port. Each TMDS channel supports signaling rates up to 2.5 Gbps to allow 1080p resolution in 12-bit color depth. The input port is enabled by configuring source selectors, S1 and S2. When an input port is selected, the TMDS inputs are connected to the TMDS outputs through a 2-to-1 multiplexer, the MOSFET between the input DDC channel and the output DDC channel is turned on, and the HPD output follows the state of the HPD_SINK. The other input port is inactive with disconnected input terminations, disconnected TMDS inputs to the outputs, disconnected DDC inputs to the outputs, and the HPD outputs are low state. Check the source selection look up table for the details of port selections. When S1 is high and S2 is low, all input terminations are disconnected, TMDS inputs are high impedance with standard TMDS terminations, all internal MOSFETs are turned off to disable the DDC links, and all HPD outputs are connected to the HPD_SINK. This allows the initiation of the HDMI physical address discovery process. Termination resistors (50-Ω), pulled up to VCC, are integrated at each TMDS receiver input. External terminations are not required. A precision resistor is connected externally from the VSADJ pin to ground for setting the differential output voltage to be compliant with the TMDS standard. The TMDS251 provides two levels of receiver input equalization for different ranges of cable lengths. Each TMDS receiver owns frequency responsive equalization circuits. When EQ sets low, the receiver supports the input connection in short range HDMI cables. When EQ sets high, the receiver supports the input connection in long range HDMI cables. The TMDS251 supports power saving operation. When a system is under standby mode and there is no digital audio/visual content from a connected source, the 3.3-V supply voltage, VCC, can be powered off to minimize power consumption from the TMDS inputs, outputs, and internal switching circuits. The HPD, DDC, and source selection circuits are powered up by the 5-V supply voltage, VDD, to maintain the system hot plug detect response, the DDC link from the selected source to the sink under system standby operation. The device is characterized for operation from 0°C to 70°C.

The TMDS261B is a two-port digital video interface (DVI) or high-definition multimedia interface (HDMI) switch that allows up to two DVI or HDMI ports to be switched to a single display terminal. Four TMDS channels, one hot-plug detector, and a digital display control (DDC) interface are supported on each port. Each TMDS channel supports signaling rates up to 3 Gbps to allow 1080p resolution in 16-bit color depth. TMDS261B device is not intended for source side applications such as external switch boxes The TMDS261B provides an adaptive equalizer for different ranges of cable lengths. The equalizer automatically compensates for intersymbol interference [ISI] loss of an HDMI/DVI cable for up to 20 dB at 3 Gbps (see ). DLP is a trademark of Texas Instruments. When any of the input ports are selected, the integrated terminations (50-Ω termination resistors pulled up to VCC) are switched on for the TMDS clock channel, the TMDS clock-detection circuit is enabled, and the DDC repeater is enabled. After a valid TMDS clock is detected, the integrated termination resistors for the data lines are enabled, and the output TMDS lines are enabled. When an input port is not selected, the integrated terminations are switched off, the TMDS receivers are disabled, and the DDC repeater is disabled. Clock-detection circuitry provides an automatic power-management feature, because if no valid TMDS clock is detected, the terminations on the input TMDS data lines are disconnected and the TMDS outputs are placed in a high-impedance state. The TMDS261B is designed to be controlled via a local I2C interface or GPIO interface, based on the status of the I2C_SEL pin. The local I2C interface in TMDS261B is a slave-only I2C interface. (See the section.) I2C Mode: When the I2C_SEL pin is set low, the device is in I2C mode. With local I2C, the interface port status can be read, and the advanced configurations of the device such as TMDS output edge rate control, DDC I2C buffer output-voltage-select (OVS) settings (See the for detailed description on DDC I2C buffer description and OVS description), device power management, TMDS clock-detect feature, and TMDS input-port selection can be set.. GPIO mode:When the I2C_SEL pin is set high, the device is in GPIO control mode. The port selection is controlled with source selectors, S1 and S2. The power-saving mode is controlled through theLPpin. In GPIO mode, the default TMDS output edge rate that is the fastest setting of rise and fall time is set, and the default DDC I2C buffer OVS setting (OVS3) is set. See and the for a detailed description of the DDC I2C buffer. Following are some of the key features (advantages) that the TMDS261B provides to the overall sink-side system (HDTV). The TMDS261B is a two-port digital video interface (DVI) or high-definition multimedia interface (HDMI) switch that allows up to two DVI or HDMI ports to be switched to a single display terminal. Four TMDS channels, one hot-plug detector, and a digital display control (DDC) interface are supported on each port. Each TMDS channel supports signaling rates up to 3 Gbps to allow 1080p resolution in 16-bit color depth. TMDS261B device is not intended for source side applications such as external switch boxes The TMDS261B provides an adaptive equalizer for different ranges of cable lengths. The equalizer automatically compensates for intersymbol interference [ISI] loss of an HDMI/DVI cable for up to 20 dB at 3 Gbps (see ). DLP is a trademark of Texas Instruments. When any of the input ports are selected, the integrated terminations (50-Ω termination resistors pulled up to VCC) are switched on for the TMDS clock channel, the TMDS clock-detection circuit is enabled, and the DDC repeater is enabled. After a valid TMDS clock is detected, the integrated termination resistors for the data lines are enabled, and the output TMDS lines are enabled. When an input port is not selected, the integrated terminations are switched off, the TMDS receivers are disabled, and the DDC repeater is disabled. Clock-detection circuitry provides an automatic power-management feature, because if no valid TMDS clock is detected, the terminations on the input TMDS data lines are disconnected and the TMDS outputs are placed in a high-impedance state. The TMDS261B is designed to be controlled via a local I2C interface or GPIO interface, based on the status of the I2C_SEL pin. The local I2C interface in TMDS261B is a slave-only I2C interface. (See the section.) I2C Mode: When the I2C_SEL pin is set low, the device is in I2C mode. With local I2C, the interface port status can be read, and the advanced configurations of the device such as TMDS output edge rate control, DDC I2C buffer output-voltage-select (OVS) settings (See the for detailed description on DDC I2C buffer description and OVS description), device power management, TMDS clock-detect feature, and TMDS input-port selection can be set.. GPIO mode:When the I2C_SEL pin is set high, the device is in GPIO control mode. The port selection is controlled with source selectors, S1 and S2. The power-saving mode is controlled through theLPpin. In GPIO mode, the default TMDS output edge rate that is the fastest setting of rise and fall time is set, and the default DDC I2C buffer OVS setting (OVS3) is set. See and the for a detailed description of the DDC I2C buffer. Following are some of the key features (advantages) that the TMDS261B provides to the overall sink-side system (HDTV).