Texas Instruments

The TLV313 family of single-, dual-, and quad-channel precision operational amplifiers combine low power consumption with good performance. This makes them suitable for a wide range of applications, such as wearables, utility metering, building automation, currency counters and more. The family features rail-to-rail input and output (RRIO) swings, low quiescent current (65 µA, typical), wide bandwidth (1 MHz) and very low noise (26 nV/√Hz at 1 kHz), making it attractive for a variety of battery-powered applications that require a good balance between cost and performance. Further, low-input-bias current enables these devices to be used in applications with megaohm source impedances. The robust design of the TLV313 devices provides ease-of-use to the circuit designer: unity-gain stability with capacitive loads of up to 150 pF, integrated RF/EMI rejection filter, no phase reversal in overdrive conditions, and high electrostatic discharge (ESD) protection (4-kV HBM). The devices are optimized for operation at voltages as low as +1.8 V (±0.9 V) and up to +5.5 V (±2.75 V), and are specified over the extended temperature range of –40°C to +125°C. The single-channel TLV313 device is available in both SC70-5 and SOT23-5 packages. The dual-channel TLV2313 device is offered in SOIC-8 and VSSOP-8 packages, and the quad-channel TLV4313 device is offered in a TSSOP-14 package. The TLV313 family of single-, dual-, and quad-channel precision operational amplifiers combine low power consumption with good performance. This makes them suitable for a wide range of applications, such as wearables, utility metering, building automation, currency counters and more. The family features rail-to-rail input and output (RRIO) swings, low quiescent current (65 µA, typical), wide bandwidth (1 MHz) and very low noise (26 nV/√Hz at 1 kHz), making it attractive for a variety of battery-powered applications that require a good balance between cost and performance. Further, low-input-bias current enables these devices to be used in applications with megaohm source impedances. The robust design of the TLV313 devices provides ease-of-use to the circuit designer: unity-gain stability with capacitive loads of up to 150 pF, integrated RF/EMI rejection filter, no phase reversal in overdrive conditions, and high electrostatic discharge (ESD) protection (4-kV HBM). The devices are optimized for operation at voltages as low as +1.8 V (±0.9 V) and up to +5.5 V (±2.75 V), and are specified over the extended temperature range of –40°C to +125°C. The single-channel TLV313 device is available in both SC70-5 and SOT23-5 packages. The dual-channel TLV2313 device is offered in SOIC-8 and VSSOP-8 packages, and the quad-channel TLV4313 device is offered in a TSSOP-14 package.

The TLVx314-Q1 family of single-, dual-, and quad-channel operational amplifiers represents a new generation of low-power, general-purpose operational amplifiers. Rail-to-rail input and output swings (RRIO), low quiescent current (150 µA typically at 5 V) combine with a wide bandwidth of 3 MHz to make this family very attractive for a variety of battery-powered applications that require a good balance between cost and performance. The TLVx314-Q1 family achieves a low-input bias current of 1 pA, making it an excellent choice for high impedance sensors. The robust design of the TLVx314-Q1 devices provides ease-of-use to the circuit designer: unity-gain stability, RRIO, capacitive loads of up to 300-pF, an integrated RF and EMI rejection filter, no phase reversal in overdrive conditions, and high electrostatic discharge (ESD) protection (4-kV HBM). These devices are optimized for low-voltage operation as low as 1.8 V (±0.9 V) and up to 5.5 V (±2.75 V), and are specified over the extended industrial temperature range of –40°C to +125°C. The TLV314-Q1 (single) is available in both 5-pin SC70 and SOT-23 packages. The TLV2314-Q1 (dual) is offered in 8-pin SOIC and VSSOP packages. The quad-channel TLV4314-Q1 is offered in a 14-pin TSSOP package. The TLVx314-Q1 family of single-, dual-, and quad-channel operational amplifiers represents a new generation of low-power, general-purpose operational amplifiers. Rail-to-rail input and output swings (RRIO), low quiescent current (150 µA typically at 5 V) combine with a wide bandwidth of 3 MHz to make this family very attractive for a variety of battery-powered applications that require a good balance between cost and performance. The TLVx314-Q1 family achieves a low-input bias current of 1 pA, making it an excellent choice for high impedance sensors. The robust design of the TLVx314-Q1 devices provides ease-of-use to the circuit designer: unity-gain stability, RRIO, capacitive loads of up to 300-pF, an integrated RF and EMI rejection filter, no phase reversal in overdrive conditions, and high electrostatic discharge (ESD) protection (4-kV HBM). These devices are optimized for low-voltage operation as low as 1.8 V (±0.9 V) and up to 5.5 V (±2.75 V), and are specified over the extended industrial temperature range of –40°C to +125°C. The TLV314-Q1 (single) is available in both 5-pin SC70 and SOT-23 packages. The TLV2314-Q1 (dual) is offered in 8-pin SOIC and VSSOP packages. The quad-channel TLV4314-Q1 is offered in a 14-pin TSSOP package.

The TLV316-Q1 (single), TLV2316-Q1 (dual), and TLV4316-Q1 (quad) devices comprise a family of general-purpose, low-power operational amplifiers. Features such as rail-to-rail input and output swings, low quiescent current (400 µA/ch typical) combined with a wide bandwidth of 10 MHz, and very-low noise (12 nV/√Hzat 1 kHz) make this family suitable for a circuits requiring a good speed and power ratio. The low input bias current supports operational amplifiers that are used in applications with megaohm source impedances. The low-input bias current of the TLVx316-Q1 yields a very-low current noise to make the family attractive for high impedance sensor interfaces. The robust design of the TLVx316-Q1 provides ease-of-use to the circuit designer: a unity-gain stable, integrated RFI and EMI rejection filter, no phase reversal in overdrive condition, and high electrostatic discharge (ESD) protection (4-kV HBM). These devices are optimized for low-voltage operation as low as 1.8 V (±0.9 V) and up to 5.5 V (±2.75 V). This latest addition of low-voltage CMOS operational amplifiers to the portfolio, in conjunction with theTLVx313-Q1andTLVx314-Q1series, offer a family of bandwidth, noise, and power options to meet the needs of a wide variety of applications. The TLV316-Q1 (single), TLV2316-Q1 (dual), and TLV4316-Q1 (quad) devices comprise a family of general-purpose, low-power operational amplifiers. Features such as rail-to-rail input and output swings, low quiescent current (400 µA/ch typical) combined with a wide bandwidth of 10 MHz, and very-low noise (12 nV/√Hzat 1 kHz) make this family suitable for a circuits requiring a good speed and power ratio. The low input bias current supports operational amplifiers that are used in applications with megaohm source impedances. The low-input bias current of the TLVx316-Q1 yields a very-low current noise to make the family attractive for high impedance sensor interfaces. The robust design of the TLVx316-Q1 provides ease-of-use to the circuit designer: a unity-gain stable, integrated RFI and EMI rejection filter, no phase reversal in overdrive condition, and high electrostatic discharge (ESD) protection (4-kV HBM). These devices are optimized for low-voltage operation as low as 1.8 V (±0.9 V) and up to 5.5 V (±2.75 V). This latest addition of low-voltage CMOS operational amplifiers to the portfolio, in conjunction with theTLVx313-Q1andTLVx314-Q1series, offer a family of bandwidth, noise, and power options to meet the needs of a wide variety of applications.

The TLV3201 and TLV3202 are single- and dual-channel comparators that offer the ultimate combination of high speed (40ns) and low-power consumption (40µA), all in extremely small packages with features such as rail-to-rail inputs, low offset voltage (1mV ), and large output drive current. The devices are also very easy to implement in a wide variety of applications where response time is critical. The TLV320x family is available in single (TLV3201) and dual (TLV3202) channel versions, both with push-pull outputs. The TLV3201 is available in 5-pin SOT-23 and 5-pin SC70 packages. The TLV3202 is available in 8-pin SOIC and 8-pin VSSOP packages. All devices are specified for operation across the expanded industrial temperature range of –40°C to 125°C. The TLV3201 and TLV3202 are single- and dual-channel comparators that offer the ultimate combination of high speed (40ns) and low-power consumption (40µA), all in extremely small packages with features such as rail-to-rail inputs, low offset voltage (1mV ), and large output drive current. The devices are also very easy to implement in a wide variety of applications where response time is critical. The TLV320x family is available in single (TLV3201) and dual (TLV3202) channel versions, both with push-pull outputs. The TLV3201 is available in 5-pin SOT-23 and 5-pin SC70 packages. The TLV3202 is available in 8-pin SOIC and 8-pin VSSOP packages. All devices are specified for operation across the expanded industrial temperature range of –40°C to 125°C.

The TLV3201 and TLV3202 are single- and dual-channel comparators that offer the ultimate combination of high speed (40ns) and low-power consumption (40µA), all in extremely small packages with features such as rail-to-rail inputs, low offset voltage (1mV ), and large output drive current. The devices are also very easy to implement in a wide variety of applications where response time is critical. The TLV320x family is available in single (TLV3201) and dual (TLV3202) channel versions, both with push-pull outputs. The TLV3201 is available in 5-pin SOT-23 and 5-pin SC70 packages. The TLV3202 is available in 8-pin SOIC and 8-pin VSSOP packages. All devices are specified for operation across the expanded industrial temperature range of –40°C to 125°C. The TLV3201 and TLV3202 are single- and dual-channel comparators that offer the ultimate combination of high speed (40ns) and low-power consumption (40µA), all in extremely small packages with features such as rail-to-rail inputs, low offset voltage (1mV ), and large output drive current. The devices are also very easy to implement in a wide variety of applications where response time is critical. The TLV320x family is available in single (TLV3201) and dual (TLV3202) channel versions, both with push-pull outputs. The TLV3201 is available in 5-pin SOT-23 and 5-pin SC70 packages. The TLV3202 is available in 8-pin SOIC and 8-pin VSSOP packages. All devices are specified for operation across the expanded industrial temperature range of –40°C to 125°C.

The TLV320ADC3101-Q1 is a low-power, stereo audio analog-to-digital converter (ADC) supporting sampling rates from 8 kHz to 96 kHz with an integrated programmable-gain amplifier providing up to 40-dB analog gain or AGC. A programmable miniDSP is provided for custom audio processing. Front-end input coarse attenuation of 0 dB, –6 dB, or off, is also provided. The inputs are programmable in a combination of single-ended or fully differential configurations. Extensive register-based power control is available via an I2C interface, enabling mono or stereo recording. Low power consumption makes the TLV320ADC3101-Q1 ideal for battery-powered portable equipment. The AGC programs to a wide range of attack (7 ms–1.4 s) and decay (50 ms–22.4 s) times. A programmable noise-gate function is included to avoid noise pumping. Low-latency IIR filters optimized for voice and telephony are available, as well as linear-phase FIR filters optimized for audio. Programmable IIR filters are also available and may be used for sound equalization, or to remove noise components. The audio serial bus can be programmed to support I2S, left-justified, right-justified, DSP, PCM, and TDM modes. The audio bus may be operated in either master or slave mode. A programmable integrated PLL is included for flexible clock generation and provides support for all standard audio rates from a wide range of available MCLKs, varying from 512 kHz to 50 MHz, including the most popular cases of 12-MHz, 13-MHz, 16-MHz, 19.2-MHz, and 19.68-MHz system clocks. The TLV320ADC3101-Q1 is a low-power, stereo audio analog-to-digital converter (ADC) supporting sampling rates from 8 kHz to 96 kHz with an integrated programmable-gain amplifier providing up to 40-dB analog gain or AGC. A programmable miniDSP is provided for custom audio processing. Front-end input coarse attenuation of 0 dB, –6 dB, or off, is also provided. The inputs are programmable in a combination of single-ended or fully differential configurations. Extensive register-based power control is available via an I2C interface, enabling mono or stereo recording. Low power consumption makes the TLV320ADC3101-Q1 ideal for battery-powered portable equipment. The AGC programs to a wide range of attack (7 ms–1.4 s) and decay (50 ms–22.4 s) times. A programmable noise-gate function is included to avoid noise pumping. Low-latency IIR filters optimized for voice and telephony are available, as well as linear-phase FIR filters optimized for audio. Programmable IIR filters are also available and may be used for sound equalization, or to remove noise components. The audio serial bus can be programmed to support I2S, left-justified, right-justified, DSP, PCM, and TDM modes. The audio bus may be operated in either master or slave mode. A programmable integrated PLL is included for flexible clock generation and provides support for all standard audio rates from a wide range of available MCLKs, varying from 512 kHz to 50 MHz, including the most popular cases of 12-MHz, 13-MHz, 16-MHz, 19.2-MHz, and 19.68-MHz system clocks.

The TLV320ADC3120 is a Burr-Brown™ high-performance, audio analog-to-digital converter (ADC) that supports simultaneous sampling of up to two analog channels or four digital channels for the pulse density modulation (PDM) microphone input. The device supports line and microphone inputs, and allows for both single-ended and differential input configurations. The device integrates programmable channel gain, digital volume control, a programmable microphone bias voltage, a phase-locked loop (PLL), a programmable high-pass filter (HPF), biquad filters, low-latency filter modes, and allows for sample rates up to 768 kHz, and allows for sample rates up to 192 kHz. The device supports time-division multiplexing (TDM), I2S, or left-justified (LJ) audio formats, and can be controlled with the I2C interface. These integrated high-performance features, along with the ability to be powered from a single-supply of 3.3 V or 1.8 V, make the device an excellent choice for space-constrained audio systems in far-field microphone recording applications. The TLV320ADC3120 is specified from –40°C to +125°C, and is offered in a 20-pin WQFN package. The TLV320ADC3120 is a Burr-Brown™ high-performance, audio analog-to-digital converter (ADC) that supports simultaneous sampling of up to two analog channels or four digital channels for the pulse density modulation (PDM) microphone input. The device supports line and microphone inputs, and allows for both single-ended and differential input configurations. The device integrates programmable channel gain, digital volume control, a programmable microphone bias voltage, a phase-locked loop (PLL), a programmable high-pass filter (HPF), biquad filters, low-latency filter modes, and allows for sample rates up to 768 kHz, and allows for sample rates up to 192 kHz. The device supports time-division multiplexing (TDM), I2S, or left-justified (LJ) audio formats, and can be controlled with the I2C interface. These integrated high-performance features, along with the ability to be powered from a single-supply of 3.3 V or 1.8 V, make the device an excellent choice for space-constrained audio systems in far-field microphone recording applications. The TLV320ADC3120 is specified from –40°C to +125°C, and is offered in a 20-pin WQFN package.

The TLV320ADC5120 is a Burr-Brown™ high-performance, audio analog-to-digital converter (ADC) that supports simultaneous sampling of up to two analog channels or four digital channels for the pulse density modulation (PDM) microphone input. The device supports line and microphone inputs, and allows for both single-ended and differential input configurations. The device integrates programmable channel gain, digital volume control, a programmable microphone bias voltage, a phase-locked loop (PLL), a programmable high-pass filter (HPF), biquad filters, low-latency filter modes, and allows for sample rates up to 768 kHz, and allows for sample rates up to 192 kHz. The device supports time-division multiplexing (TDM), I2S, or left-justified (LJ) audio formats, and can be controlled with the I2C interface. These integrated high-performance features, along with the ability to be powered from a single-supply of 3.3 V or 1.8 V, make the device an excellent choice for space-constrained audio systems in far-field microphone recording applications. The TLV320ADC5120 is specified from –40°C to +125°C, and is offered in a 20-pin WQFN package. The TLV320ADC5120 is a Burr-Brown™ high-performance, audio analog-to-digital converter (ADC) that supports simultaneous sampling of up to two analog channels or four digital channels for the pulse density modulation (PDM) microphone input. The device supports line and microphone inputs, and allows for both single-ended and differential input configurations. The device integrates programmable channel gain, digital volume control, a programmable microphone bias voltage, a phase-locked loop (PLL), a programmable high-pass filter (HPF), biquad filters, low-latency filter modes, and allows for sample rates up to 768 kHz, and allows for sample rates up to 192 kHz. The device supports time-division multiplexing (TDM), I2S, or left-justified (LJ) audio formats, and can be controlled with the I2C interface. These integrated high-performance features, along with the ability to be powered from a single-supply of 3.3 V or 1.8 V, make the device an excellent choice for space-constrained audio systems in far-field microphone recording applications. The TLV320ADC5120 is specified from –40°C to +125°C, and is offered in a 20-pin WQFN package.

The TLV320AIC3263 (also referred to as the AIC3263) is a flexible, highly-integrated, low-power, low-voltage stereo audio codec. The AIC3263 features four digital microphone inputs, plus programmable outputs, PowerTune capabilities, enhanced fully-programmable miniDSP, predefined and parameterizable signal processing blocks, integrated PLL, and flexible digital audio interfaces. Extensive register-based control of power, input and output channel configuration, gains, effects, pin-multiplexing and clocks are included, allowing the device to be precisely targeted to its application. The TLV320AIC3263 features two fully-programmable miniDSP cores that support application-specific algorithms in the record and/or the playback path of the device. The miniDSP cores are fully software programmable. Targeted miniDSP algorithms, such as active noise cancellation, acoustic echo cancellation or advanced DSP filtering are loaded into the device after power-up. Combined with the advanced PowerTune technology, the device can execute operations from 8kHz mono voice playback to stereo 192kHz DAC playback, making it ideal for portable battery-powered audio and telephony applications. The record path of the TLV320AIC3263 covers operations from 8kHz mono to 192kHz stereo recording, and contains programmable input channel configurations which cover single-ended and differential setups, as well as floating or mixing input signals. It also provides a digitally-controlled stereo microphone preamplifier and integrated microphone bias. One application of the digital signal processing blocks is removable of audible noise that may be introduced by mechanical coupling, such as optical zooming in a digital camera. The record path can also be configured for up to two stereo Pulse Density Modulation (PDM) interfaces (for instance, supporting up to 4 digital microphones) typically used at 64Fs or 128Fs. The playback path offers signal processing blocks for filtering and effects; headphone, line, receiver, and Class-D speaker output; flexible mixing of DAC; and analog input signals as well as programmable volume controls. The playback path contains two high-power DirectPathTMheadphone output drivers which eliminate the need for ac coupling capacitors. A built in charge pump generates the negative supply for the ground centered headphone drivers. These headphone output drivers can be configured in multiple ways, including stereo, and mono BTL. In addition, playback audio can be routed to an integrated Class-D speaker driver or a differential receiver amplifier. The integrated PowerTune technology allows the device to be tuned to just the right power-performance trade-off. Mobile applications frequently have multiple use cases requiring very low-power operation while being used in a mobile environment. When used in a docked environment power consumption typically is less of a concern while lowest possible noise is important. With PowerTune the TLV320AIC3263 can address both cases. The required internal clock of the TLV320AIC3263 can be derived from multiple sources, including the MCLK pin, the BCLK1 pin, the BCLK2 pin, several general purpose I/O pins or the output of the internal PLL, where the input to the PLL again can be derived from similar pins. Although using the internal fractional PLL ensures the availability of a suitable clock signal, it is not recommended for the lowest power settings. The PLL is highly programmable and can accept available input clocks in the range of 512kHz to 50MHz. To enable even lower clock frequencies, an integrated low-frequency clock multiplier can also be used as an input to the PLL. The TLV320AIC3263 has a 12-bit SAR ADC converter that supports system voltage measurements. These system voltage measurements can be sourced from three dedicated analog inputs (IN1L/AUX1, IN1R/AUX2, or VBAT pins), or, alternatively, an on-chip temperature sensor that can be read by the SAR ADC. The device also features three full Digital Audio Serial Interfaces, each supporting I2S, DSP/TDM, RJF, LJF, and mono PCM formats. This enables three simultaneous digital playback and record paths to three independent digital audio buses or chips. Additionally, the general purpose interrupt pins can be used to connect to a fourth digital audio bus, allowing the end system to easily switch in this fourth audio bus to one of the three Digital Audio Serial Interfaces. Each of the three Digital Audio Serial Interfaces can be run using separate power voltages to enable easy integration with separate chips with different I/O voltages. The device is available in the 4.81 mm × 4.81 mm × 0.625 mm 81-Ball WCSP (DSBGA) Package. The TLV320AIC3263 (also referred to as the AIC3263) is a flexible, highly-integrated, low-power, low-voltage stereo audio codec. The AIC3263 features four digital microphone inputs, plus programmable outputs, PowerTune capabilities, enhanced fully-programmable miniDSP, predefined and parameterizable signal processing blocks, integrated PLL, and flexible digital audio interfaces. Extensive register-based control of power, input and output channel configuration, gains, effects, pin-multiplexing and clocks are included, allowing the device to be precisely targeted to its application. The TLV320AIC3263 features two fully-programmable miniDSP cores that support application-specific algorithms in the record and/or the playback path of the device. The miniDSP cores are fully software programmable. Targeted miniDSP algorithms, such as active noise cancellation, acoustic echo cancellation or advanced DSP filtering are loaded into the device after power-up. Combined with the advanced PowerTune technology, the device can execute operations from 8kHz mono voice playback to stereo 192kHz DAC playback, making it ideal for portable battery-powered audio and telephony applications. The record path of the TLV320AIC3263 covers operations from 8kHz mono to 192kHz stereo recording, and contains programmable input channel configurations which cover single-ended and differential setups, as well as floating or mixing input signals. It also provides a digitally-controlled stereo microphone preamplifier and integrated microphone bias. One application of the digital signal processing blocks is removable of audible noise that may be introduced by mechanical coupling, such as optical zooming in a digital camera. The record path can also be configured for up to two stereo Pulse Density Modulation (PDM) interfaces (for instance, supporting up to 4 digital microphones) typically used at 64Fs or 128Fs. The playback path offers signal processing blocks for filtering and effects; headphone, line, receiver, and Class-D speaker output; flexible mixing of DAC; and analog input signals as well as programmable volume controls. The playback path contains two high-power DirectPathTMheadphone output drivers which eliminate the need for ac coupling capacitors. A built in charge pump generates the negative supply for the ground centered headphone drivers. These headphone output drivers can be configured in multiple ways, including stereo, and mono BTL. In addition, playback audio can be routed to an integrated Class-D speaker driver or a differential receiver amplifier. The integrated PowerTune technology allows the device to be tuned to just the right power-performance trade-off. Mobile applications frequently have multiple use cases requiring very low-power operation while being used in a mobile environment. When used in a docked environment power consumption typically is less of a concern while lowest possible noise is important. With PowerTune the TLV320AIC3263 can address both cases. The required internal clock of the TLV320AIC3263 can be derived from multiple sources, including the MCLK pin, the BCLK1 pin, the BCLK2 pin, several general purpose I/O pins or the output of the internal PLL, where the input to the PLL again can be derived from similar pins. Although using the internal fractional PLL ensures the availability of a suitable clock signal, it is not recommended for the lowest power settings. The PLL is highly programmable and can accept available input clocks in the range of 512kHz to 50MHz. To enable even lower clock frequencies, an integrated low-frequency clock multiplier can also be used as an input to the PLL. The TLV320AIC3263 has a 12-bit SAR ADC converter that supports system voltage measurements. These system voltage measurements can be sourced from three dedicated analog inputs (IN1L/AUX1, IN1R/AUX2, or VBAT pins), or, alternatively, an on-chip temperature sensor that can be read by the SAR ADC. The device also features three full Digital Audio Serial Interfaces, each supporting I2S, DSP/TDM, RJF, LJF, and mono PCM formats. This enables three simultaneous digital playback and record paths to three independent digital audio buses or chips. Additionally, the general purpose interrupt pins can be used to connect to a fourth digital audio bus, allowing the end system to easily switch in this fourth audio bus to one of the three Digital Audio Serial Interfaces. Each of the three Digital Audio Serial Interfaces can be run using separate power voltages to enable easy integration with separate chips with different I/O voltages. The device is available in the 4.81 mm × 4.81 mm × 0.625 mm 81-Ball WCSP (DSBGA) Package.

The TLV320AIC3106-Q1 is a low-power stereo audio codec with stereo headphone amplifier, as well as multiple inputs and outputs programmable in single-ended or fully differential configurations. Extensive register-based power control is included, enabling stereo 48-kHz DAC playback as low as 15 mW from a 3.3-V analog supply, making it ideal for car audio applications in cluster and head unit systems. The record path of the TLV320AIC3106-Q1 contains integrated microphone bias, digitally controlled stereo microphone preamplifier, and automatic gain control (AGC), with mix and mux capability among the multiple analog inputs. Programmable filters are available during record which can remove audible noise that can occur in unpredictable environments, such as when an eCall system is activated. The playback path includes mix and mux capability from the stereo DAC and selected inputs, through programmable volume controls, to the various outputs. The TLV320AIC3106-Q1 contains four high-power output drivers as well as three fully differential output drivers. The high-power output drivers are capable of driving a variety of load configurations, including up to four channels of single-ended 16-Ω headphones using AC-coupling capacitors, or stereo 16-Ω headphones in a capacitorless output configuration. These parameters enable the TLV320AIC3106-Q1 to act as an interface from the MCU to the speaker amplifiers, such as the TPA3111D1-Q1, in various audio applications in infotainment and clusters. The stereo audio DAC supports sampling rates from 8 kHz to 96 kHz and includes programmable digital filtering in the DAC path for 3D, bass, treble, midrange effects, speaker equalization, and de-emphasis for 32-kHz, 44.1-kHz, and 48-kHz rates. The stereo audio ADC supports sampling rates from 8 kHz to 96 kHz and is preceded by programmable gain amplifiers or AGC that can provide up to 59.5-dB analog gain for low-level microphone inputs. The TLV320AIC3106-Q1 provides an extremely high range of programmability for both attack (8 ms to 1408 ms) and for decay (0.05 s to 22.4 s). This extended AGC range allows the AGC to be tuned for many types of applications. The serial control bus supports SPI or I2C protocols, while the serial audio data bus is programmable for I2S, left/right-justified, DSP, or TDM modes. A highly programmable PLL is included for flexible clock generation and support for all standard audio rates from a wide range of available MCLKs, varying from 512 kHz to 50 MHz, with special attention paid to the most popular cases of 12-MHz, 13-MHz, 16-MHz, 19.2-MHz, and 19.68-MHz system clocks. The TLV320AIC3106-Q1 operates from an analog supply of 2.7 V to 3.6 V, a digital core supply of 1.65 V to 1.95 V, and a digital I/O supply of 1.1 V to 3.6 V. The device is available in the 7-mm × 7-mm, 48-lead VQFN (RGZ) package. The TLV320AIC3106-Q1 is a low-power stereo audio codec with stereo headphone amplifier, as well as multiple inputs and outputs programmable in single-ended or fully differential configurations. Extensive register-based power control is included, enabling stereo 48-kHz DAC playback as low as 15 mW from a 3.3-V analog supply, making it ideal for car audio applications in cluster and head unit systems. The record path of the TLV320AIC3106-Q1 contains integrated microphone bias, digitally controlled stereo microphone preamplifier, and automatic gain control (AGC), with mix and mux capability among the multiple analog inputs. Programmable filters are available during record which can remove audible noise that can occur in unpredictable environments, such as when an eCall system is activated. The playback path includes mix and mux capability from the stereo DAC and selected inputs, through programmable volume controls, to the various outputs. The TLV320AIC3106-Q1 contains four high-power output drivers as well as three fully differential output drivers. The high-power output drivers are capable of driving a variety of load configurations, including up to four channels of single-ended 16-Ω headphones using AC-coupling capacitors, or stereo 16-Ω headphones in a capacitorless output configuration. These parameters enable the TLV320AIC3106-Q1 to act as an interface from the MCU to the speaker amplifiers, such as the TPA3111D1-Q1, in various audio applications in infotainment and clusters. The stereo audio DAC supports sampling rates from 8 kHz to 96 kHz and includes programmable digital filtering in the DAC path for 3D, bass, treble, midrange effects, speaker equalization, and de-emphasis for 32-kHz, 44.1-kHz, and 48-kHz rates. The stereo audio ADC supports sampling rates from 8 kHz to 96 kHz and is preceded by programmable gain amplifiers or AGC that can provide up to 59.5-dB analog gain for low-level microphone inputs. The TLV320AIC3106-Q1 provides an extremely high range of programmability for both attack (8 ms to 1408 ms) and for decay (0.05 s to 22.4 s). This extended AGC range allows the AGC to be tuned for many types of applications. The serial control bus supports SPI or I2C protocols, while the serial audio data bus is programmable for I2S, left/right-justified, DSP, or TDM modes. A highly programmable PLL is included for flexible clock generation and support for all standard audio rates from a wide range of available MCLKs, varying from 512 kHz to 50 MHz, with special attention paid to the most popular cases of 12-MHz, 13-MHz, 16-MHz, 19.2-MHz, and 19.68-MHz system clocks. The TLV320AIC3106-Q1 operates from an analog supply of 2.7 V to 3.6 V, a digital core supply of 1.65 V to 1.95 V, and a digital I/O supply of 1.1 V to 3.6 V. The device is available in the 7-mm × 7-mm, 48-lead VQFN (RGZ) package.