Texas Instruments

The THS6214 is a dual-port, current-feedback architecture, differential line driver amplifier system ideal for xDSL systems. The device is targeted for use in very-high-bit-rate digital subscriber line 2 (VDSL2) line driver systems that enable greater than 14.5-dBm line power, supporting the G.993.2 VDSL2 17a profile. The device is also fast enough to support central-office transmissions of 14.5-dBm line power up to 30 MHz. The device is also targeted for use as a broadband or wideband power line communications (PLC) amplifier for line driver applications. The unique architecture of the THS6214 uses minimal quiescent current and still achieves very high linearity. Differential distortion, under full bias conditions, is –93 dBc at 1 MHz and reduces to only –73 dBc at 10 MHz. Fixed multiple bias settings of the amplifiers allow for enhanced power savings for line lengths where the full performance of the amplifier is not required. To allow for even more flexibility and power savings, an adjustable current pin (IADJ) is available to further lower the bias currents. The wide output swing of 43.2 VPP(100-Ω differential load) with ±12-V power supplies, coupled with over 416-mA current drive (25-Ω load), allows for wide dynamic headroom, keeping distortion minimal. The THS6214 is available in a VQFN-24 or a HTSSOP-24 PowerPAD™ package. The THS6214 is a dual-port, current-feedback architecture, differential line driver amplifier system ideal for xDSL systems. The device is targeted for use in very-high-bit-rate digital subscriber line 2 (VDSL2) line driver systems that enable greater than 14.5-dBm line power, supporting the G.993.2 VDSL2 17a profile. The device is also fast enough to support central-office transmissions of 14.5-dBm line power up to 30 MHz. The device is also targeted for use as a broadband or wideband power line communications (PLC) amplifier for line driver applications. The unique architecture of the THS6214 uses minimal quiescent current and still achieves very high linearity. Differential distortion, under full bias conditions, is –93 dBc at 1 MHz and reduces to only –73 dBc at 10 MHz. Fixed multiple bias settings of the amplifiers allow for enhanced power savings for line lengths where the full performance of the amplifier is not required. To allow for even more flexibility and power savings, an adjustable current pin (IADJ) is available to further lower the bias currents. The wide output swing of 43.2 VPP(100-Ω differential load) with ±12-V power supplies, coupled with over 416-mA current drive (25-Ω load), allows for wide dynamic headroom, keeping distortion minimal. The THS6214 is available in a VQFN-24 or a HTSSOP-24 PowerPAD™ package.

The THS6222 is a differential line-driver amplifier with a current-feedback architecture manufactured using Texas Instruments’ proprietary, high-speed, silicon-germanium (SiGe) process. The device is targeted for use in broadband, high-speed, power line communications (HPLC, IEEE 1901.1) line driver applications that require high linearity when driving heavy line loads. The THS6222 supports PLC standards including G3, PRIME, ISO 15118 (HPGP), G.hn and PRIME BPL. Common modulation schema: OOK, FSK, OFDM. The unique architecture of the THS6222 uses minimal quiescent current while achieving very high linearity. The amplifier has an adjustable current pin (IADJ) that sets the nominal current consumption along with the multiple bias modes that allow for enhanced power savings where the full performance of the amplifier is not required. Shutdown bias mode provides further power savings during receive mode in time division multiplexed (TDM) systems while maintaining high output impedance. The integrated midsupply common-mode buffer eliminates external components, reducing system cost and board space. The wide output swing of 57VPP (100Ω load) with 32V power supplies, coupled with over 650mA of current drive (25Ω load), allows for wide dynamic range that keeps distortion minimal. The THS6222 is available in 16-pin and 24-pin VQFN packages with exposed thermal pad, and is specified for operation from –40°C to +85°C. The THS6222 is a differential line-driver amplifier with a current-feedback architecture manufactured using Texas Instruments’ proprietary, high-speed, silicon-germanium (SiGe) process. The device is targeted for use in broadband, high-speed, power line communications (HPLC, IEEE 1901.1) line driver applications that require high linearity when driving heavy line loads. The THS6222 supports PLC standards including G3, PRIME, ISO 15118 (HPGP), G.hn and PRIME BPL. Common modulation schema: OOK, FSK, OFDM. The unique architecture of the THS6222 uses minimal quiescent current while achieving very high linearity. The amplifier has an adjustable current pin (IADJ) that sets the nominal current consumption along with the multiple bias modes that allow for enhanced power savings where the full performance of the amplifier is not required. Shutdown bias mode provides further power savings during receive mode in time division multiplexed (TDM) systems while maintaining high output impedance. The integrated midsupply common-mode buffer eliminates external components, reducing system cost and board space. The wide output swing of 57VPP (100Ω load) with 32V power supplies, coupled with over 650mA of current drive (25Ω load), allows for wide dynamic range that keeps distortion minimal. The THS6222 is available in 16-pin and 24-pin VQFN packages with exposed thermal pad, and is specified for operation from –40°C to +85°C.

The THS6226A is a dual-port, class H, current-feedback architecture, differential line driver amplifier system ideal for xDSL systems. The device is targeted for use in very-high-bit-rate digital subscriber line 2 (VDSL2) line driver systems that enable native DTM signals while supporting greater than +20.5-dBm line power (up to 8.5 MHz) with good linearity, supporting the G.993.2 VDSL2 8b profile. The device is also fast enough to support central-office transmissions of +14.5-dBm line power up to 30 MHz. The unique architecture of the device allows quiescent current to be minimal while still achieving very high linearity. Differential distortion, under full bias conditions, is –91 dBc at 1 MHz and reduces to only –75 dBc at 5 MHz. Fixed multiple bias settings of the amplifiers offer enhanced power savings for line lengths where the full performance of the amplifier is not required. To allow for even more flexibility and power savings on all profiles, quiescent current is digitally adjustable from 7.6 mA to 23 mA with a bias current step of 1.0 mA. For systems where additional power savings while not transmitting are desired, the device can be used in its line termination mode to maintain impedance matching. The wide output swing on +12-V power supplies, coupled with excellent current drive, allows for wide dynamic headroom, keeping distortion minimal. The device is available in a VQFN-32 PowerPAD™ package. The THS6226A is a dual-port, class H, current-feedback architecture, differential line driver amplifier system ideal for xDSL systems. The device is targeted for use in very-high-bit-rate digital subscriber line 2 (VDSL2) line driver systems that enable native DTM signals while supporting greater than +20.5-dBm line power (up to 8.5 MHz) with good linearity, supporting the G.993.2 VDSL2 8b profile. The device is also fast enough to support central-office transmissions of +14.5-dBm line power up to 30 MHz. The unique architecture of the device allows quiescent current to be minimal while still achieving very high linearity. Differential distortion, under full bias conditions, is –91 dBc at 1 MHz and reduces to only –75 dBc at 5 MHz. Fixed multiple bias settings of the amplifiers offer enhanced power savings for line lengths where the full performance of the amplifier is not required. To allow for even more flexibility and power savings on all profiles, quiescent current is digitally adjustable from 7.6 mA to 23 mA with a bias current step of 1.0 mA. For systems where additional power savings while not transmitting are desired, the device can be used in its line termination mode to maintain impedance matching. The wide output swing on +12-V power supplies, coupled with excellent current drive, allows for wide dynamic headroom, keeping distortion minimal. The device is available in a VQFN-32 PowerPAD™ package.

The THS6301 is a single-channel, current-feedback architecture, differential line driver that enables G.Fast and different digital subscriber line (DSL) home gateway systems. The device enables106-MHz and 212-MHz G.Fast digital subscriber line profiles that use native discrete multitone modulation (DMT) signals. The THS6301 functions with high linearity at an 8-dBm line power through 212 MHz. The unique architecture of this device minimizes quiescent current while providing very high linearity. Internally-fixed bias settings of the amplifier provide power savings for line-driving modes where the full performance of the amplifier is not needed. For further flexibility and power savings, the overall quiescent current is adjustable by a single external bias resistor connected to one of the device pins. The device also features two line-termination modes to maintain impedance matching at very low power consumption. The device can also be used as a fixed-gain differential amplifier with bandwidth and power-scaling to suit the needs of differential applications. The device is available in a 4-mm × 4-mm, 16-pin, VQFN package. The THS6301 is a single-channel, current-feedback architecture, differential line driver that enables G.Fast and different digital subscriber line (DSL) home gateway systems. The device enables106-MHz and 212-MHz G.Fast digital subscriber line profiles that use native discrete multitone modulation (DMT) signals. The THS6301 functions with high linearity at an 8-dBm line power through 212 MHz. The unique architecture of this device minimizes quiescent current while providing very high linearity. Internally-fixed bias settings of the amplifier provide power savings for line-driving modes where the full performance of the amplifier is not needed. For further flexibility and power savings, the overall quiescent current is adjustable by a single external bias resistor connected to one of the device pins. The device also features two line-termination modes to maintain impedance matching at very low power consumption. The device can also be used as a fixed-gain differential amplifier with bandwidth and power-scaling to suit the needs of differential applications. The device is available in a 4-mm × 4-mm, 16-pin, VQFN package.

The THS6302 is a dual port, current-feedback architecture, differential line driver designed for G.Fast and a variety of digital subscriber line (DSL) systems. The device is targeted for use in G.Fast digital subscriber line systems that enable native discrete multitone modulation (DMT) signals and supports an 8-dBm line power up to 212 MHz with good linearity. The unique architecture of this device allows quiescent current to be minimal and still achieve very high linearity. Internally-fixed bias settings of the amplifiers offer enhanced power savings for line-driving modes where the full performance of the amplifier is not required. To allow for even more flexibility and power savings, the overall quiescent current for both ports is adjustable by a single external bias resistor connected to one of the device pins. The device also features two line-termination modes to maintain impedance matching at very low power consumption. The THS6302 is a dual port device suitable for CO (Central Office) applications in DSL systems and is similar to the single portTHS6301device that is suitable in CPE (Customer-Premises Equipment) DSL applications. THS6302 device is available in a 4-mm × 5-mm, 28-pin, VQFN package. The THS6302 is a dual port, current-feedback architecture, differential line driver designed for G.Fast and a variety of digital subscriber line (DSL) systems. The device is targeted for use in G.Fast digital subscriber line systems that enable native discrete multitone modulation (DMT) signals and supports an 8-dBm line power up to 212 MHz with good linearity. The unique architecture of this device allows quiescent current to be minimal and still achieve very high linearity. Internally-fixed bias settings of the amplifiers offer enhanced power savings for line-driving modes where the full performance of the amplifier is not required. To allow for even more flexibility and power savings, the overall quiescent current for both ports is adjustable by a single external bias resistor connected to one of the device pins. The device also features two line-termination modes to maintain impedance matching at very low power consumption. The THS6302 is a dual port device suitable for CO (Central Office) applications in DSL systems and is similar to the single portTHS6301device that is suitable in CPE (Customer-Premises Equipment) DSL applications. THS6302 device is available in a 4-mm × 5-mm, 28-pin, VQFN package.

The THS7001 (single) and THS7002 (dual) are high-speed programmable-gain amplifiers, ideal for applications where load impedance can often vary. Each channel on this device consists of a separate low-noise input preamp and a programmable gain amplifier (PGA). The preamp is a voltage-feedback amplifier offering a low 1.7-nV/Hzvoltage noise with a 100-MHz (-3 dB) bandwidth. The output pin of the preamp is accessible so that filters can be easily added to the amplifier. The 3-bit digitally-controlled PGA provides a -22-dB to 20-dB attenuation/gain range with a 6-dB step resolution. In addition, the PGA provides both high and low output clamp protection to prevent the output signal from swinging outside the common-mode input range of an analog-to-digital converter. The PGA provides a wide 70-MHz (-3 dB) bandwidth, which remains relatively constant over the entire gain/attenuation range. Independent shutdown control is also provided for power conservation and multiplexing. These devices operate over a wide ±4.5-V to ±16-V supply voltage range. The THS7001 (single) and THS7002 (dual) are high-speed programmable-gain amplifiers, ideal for applications where load impedance can often vary. Each channel on this device consists of a separate low-noise input preamp and a programmable gain amplifier (PGA). The preamp is a voltage-feedback amplifier offering a low 1.7-nV/Hzvoltage noise with a 100-MHz (-3 dB) bandwidth. The output pin of the preamp is accessible so that filters can be easily added to the amplifier. The 3-bit digitally-controlled PGA provides a -22-dB to 20-dB attenuation/gain range with a 6-dB step resolution. In addition, the PGA provides both high and low output clamp protection to prevent the output signal from swinging outside the common-mode input range of an analog-to-digital converter. The PGA provides a wide 70-MHz (-3 dB) bandwidth, which remains relatively constant over the entire gain/attenuation range. Independent shutdown control is also provided for power conservation and multiplexing. These devices operate over a wide ±4.5-V to ±16-V supply voltage range.

The THS7001 (single) and THS7002 (dual) are high-speed programmable-gain amplifiers, ideal for applications where load impedance can often vary. Each channel on this device consists of a separate low-noise input preamp and a programmable gain amplifier (PGA). The preamp is a voltage-feedback amplifier offering a low 1.7-nV/Hzvoltage noise with a 100-MHz (-3 dB) bandwidth. The output pin of the preamp is accessible so that filters can be easily added to the amplifier. The 3-bit digitally-controlled PGA provides a -22-dB to 20-dB attenuation/gain range with a 6-dB step resolution. In addition, the PGA provides both high and low output clamp protection to prevent the output signal from swinging outside the common-mode input range of an analog-to-digital converter. The PGA provides a wide 70-MHz (-3 dB) bandwidth, which remains relatively constant over the entire gain/attenuation range. Independent shutdown control is also provided for power conservation and multiplexing. These devices operate over a wide ±4.5-V to ±16-V supply voltage range. The THS7001 (single) and THS7002 (dual) are high-speed programmable-gain amplifiers, ideal for applications where load impedance can often vary. Each channel on this device consists of a separate low-noise input preamp and a programmable gain amplifier (PGA). The preamp is a voltage-feedback amplifier offering a low 1.7-nV/Hzvoltage noise with a 100-MHz (-3 dB) bandwidth. The output pin of the preamp is accessible so that filters can be easily added to the amplifier. The 3-bit digitally-controlled PGA provides a -22-dB to 20-dB attenuation/gain range with a 6-dB step resolution. In addition, the PGA provides both high and low output clamp protection to prevent the output signal from swinging outside the common-mode input range of an analog-to-digital converter. The PGA provides a wide 70-MHz (-3 dB) bandwidth, which remains relatively constant over the entire gain/attenuation range. Independent shutdown control is also provided for power conservation and multiplexing. These devices operate over a wide ±4.5-V to ±16-V supply voltage range.

Fabricated using the new complementary silicon-germanium (SiGe) BiCom-3 process, the THS7303 is a low-power, single-supply, 2.7-V to 5-V, 3-channel integrated video buffer. It incorporates a selectable fifth-order Butterworth filter to eliminate data converter images. The 9-MHz filter is a perfect choice for SDTV video including composite (CVBS), S-Video, and 480i/576i Y'P'BP'R, and G'B'R' (R'G'B') signals. The 16-MHz filter is ideal for EDTV 480p/576p Y'P'BP'R, G'B'R', and VGA signals. The 35-MHz filter is useful for HDTV 720p/1080i Y'P'BP'R, G'B'R', and SVGA/XGA signals. For 1080p or SXGA/UXGA signals, the filter can be bypassed allowing a 190-MHz bandwidth, 300-V/µs amplifier to buffer the signal. Each channel of the THS7303 is individually I2C configurable for all functions which makes it flexible for any application. Its rail-to-rail output stage allows for both ac and dc coupling applications. The 6-dB gain along with the built-in SAG correction allows for maximum flexibility as an output video buffer. The 16.6-mA total quiescent current (55 mW total power) makes the THS7303 an excellent choice for USB powered or portable video applications. While fully disabled, the THS7303 consumes less than 1 µA making it ideal for energy sensitive applications. As part of the THS7303 flexibility, the 2:1 MUX input can be selected for ac- or dc-coupled inputs. The ac-coupled modes include a sync-tip-clamp option for CVBS/Y'/G'/B'/R' with sync or a fixed bias for the C'/P'B/P'Rnon-sync channels. The dc input options include a dc input or a (dc + 135-mV) input offset shift to allow for a full sync dynamic range at the output with 0-V input. Fabricated using the new complementary silicon-germanium (SiGe) BiCom-3 process, the THS7303 is a low-power, single-supply, 2.7-V to 5-V, 3-channel integrated video buffer. It incorporates a selectable fifth-order Butterworth filter to eliminate data converter images. The 9-MHz filter is a perfect choice for SDTV video including composite (CVBS), S-Video, and 480i/576i Y'P'BP'R, and G'B'R' (R'G'B') signals. The 16-MHz filter is ideal for EDTV 480p/576p Y'P'BP'R, G'B'R', and VGA signals. The 35-MHz filter is useful for HDTV 720p/1080i Y'P'BP'R, G'B'R', and SVGA/XGA signals. For 1080p or SXGA/UXGA signals, the filter can be bypassed allowing a 190-MHz bandwidth, 300-V/µs amplifier to buffer the signal. Each channel of the THS7303 is individually I2C configurable for all functions which makes it flexible for any application. Its rail-to-rail output stage allows for both ac and dc coupling applications. The 6-dB gain along with the built-in SAG correction allows for maximum flexibility as an output video buffer. The 16.6-mA total quiescent current (55 mW total power) makes the THS7303 an excellent choice for USB powered or portable video applications. While fully disabled, the THS7303 consumes less than 1 µA making it ideal for energy sensitive applications. As part of the THS7303 flexibility, the 2:1 MUX input can be selected for ac- or dc-coupled inputs. The ac-coupled modes include a sync-tip-clamp option for CVBS/Y'/G'/B'/R' with sync or a fixed bias for the C'/P'B/P'Rnon-sync channels. The dc input options include a dc input or a (dc + 135-mV) input offset shift to allow for a full sync dynamic range at the output with 0-V input.