ADC3910S02510-bit, one-channel, 25-MSPS ADC single clock cycle latency up to 16x decimation digital comparator | Unclassified | 2 | Active | The ADC3910Dx and ADC3910Sx are a family ultra-low power 10-bit 125MSPS high-speed single and dual channel analog-to-digital converters. High-speed control loops benefit from the short latency of only 1 clock cycle. The ADC consumes only 92mW at 125Msps with a power consumption that scales with lower sampling rates.
The device uses DDR, HDDR, SDR or serial CMOS interface to output the data from +1.8V to +3.3V to accommodate various receiver requirements. The device implements analog monitoring function by event triggered interrupts per channel using a digital comparator with programmable high and low thresholds, hysteresis, and event counter. The device is a pin-to-pin compatible family of ADCs with 8 and 10-bit resolution and different speed grades. The device is available in a 32-pin VQFN package, and supports industrial temperature range from -40 to +105°C.
The ADC3910Dx and ADC3910Sx are a family ultra-low power 10-bit 125MSPS high-speed single and dual channel analog-to-digital converters. High-speed control loops benefit from the short latency of only 1 clock cycle. The ADC consumes only 92mW at 125Msps with a power consumption that scales with lower sampling rates.
The device uses DDR, HDDR, SDR or serial CMOS interface to output the data from +1.8V to +3.3V to accommodate various receiver requirements. The device implements analog monitoring function by event triggered interrupts per channel using a digital comparator with programmable high and low thresholds, hysteresis, and event counter. The device is a pin-to-pin compatible family of ADCs with 8 and 10-bit resolution and different speed grades. The device is available in a 32-pin VQFN package, and supports industrial temperature range from -40 to +105°C. |
ADC3910S06510-bit, one-channel, 65-MSPS ADC single clock cycle latency up to 16x decimation digital comparator | Unclassified | 2 | Active | The ADC3910Dx and ADC3910Sx are a family ultra-low power 10-bit 125MSPS high-speed single and dual channel analog-to-digital converters. High-speed control loops benefit from the short latency of only 1 clock cycle. The ADC consumes only 92mW at 125Msps with a power consumption that scales with lower sampling rates.
The device uses DDR, HDDR, SDR or serial CMOS interface to output the data from +1.8V to +3.3V to accommodate various receiver requirements. The device implements analog monitoring function by event triggered interrupts per channel using a digital comparator with programmable high and low thresholds, hysteresis, and event counter. The device is a pin-to-pin compatible family of ADCs with 8 and 10-bit resolution and different speed grades. The device is available in a 32-pin VQFN package, and supports industrial temperature range from -40 to +105°C.
The ADC3910Dx and ADC3910Sx are a family ultra-low power 10-bit 125MSPS high-speed single and dual channel analog-to-digital converters. High-speed control loops benefit from the short latency of only 1 clock cycle. The ADC consumes only 92mW at 125Msps with a power consumption that scales with lower sampling rates.
The device uses DDR, HDDR, SDR or serial CMOS interface to output the data from +1.8V to +3.3V to accommodate various receiver requirements. The device implements analog monitoring function by event triggered interrupts per channel using a digital comparator with programmable high and low thresholds, hysteresis, and event counter. The device is a pin-to-pin compatible family of ADCs with 8 and 10-bit resolution and different speed grades. The device is available in a 32-pin VQFN package, and supports industrial temperature range from -40 to +105°C. |
ADC3910S12510-bit, one-channel, 125-MSPS ADC single clock cycle latency up to 16x decimation digital comparator | Unclassified | 2 | Active | The ADC3910Dx and ADC3910Sx are a family ultra-low power 10-bit 125MSPS high-speed single and dual channel analog-to-digital converters. High-speed control loops benefit from the short latency of only 1 clock cycle. The ADC consumes only 92mW at 125Msps with a power consumption that scales with lower sampling rates.
The device uses DDR, HDDR, SDR or serial CMOS interface to output the data from +1.8V to +3.3V to accommodate various receiver requirements. The device implements analog monitoring function by event triggered interrupts per channel using a digital comparator with programmable high and low thresholds, hysteresis, and event counter. The device is a pin-to-pin compatible family of ADCs with 8 and 10-bit resolution and different speed grades. The device is available in a 32-pin VQFN package, and supports industrial temperature range from -40 to +105°C.
The ADC3910Dx and ADC3910Sx are a family ultra-low power 10-bit 125MSPS high-speed single and dual channel analog-to-digital converters. High-speed control loops benefit from the short latency of only 1 clock cycle. The ADC consumes only 92mW at 125Msps with a power consumption that scales with lower sampling rates.
The device uses DDR, HDDR, SDR or serial CMOS interface to output the data from +1.8V to +3.3V to accommodate various receiver requirements. The device implements analog monitoring function by event triggered interrupts per channel using a digital comparator with programmable high and low thresholds, hysteresis, and event counter. The device is a pin-to-pin compatible family of ADCs with 8 and 10-bit resolution and different speed grades. The device is available in a 32-pin VQFN package, and supports industrial temperature range from -40 to +105°C. |
| Evaluation Boards | 1 | Active | |
| Analog to Digital Converters (ADCs) Evaluation Boards | 1 | Active | |
| Data Acquisition | 2 | Obsolete | |
ADC78H897-Channel, 500 KSPS, 12-Bit A/D Converter | Data Acquisition | 1 | Active | The ADC78H89 is a low-power, seven-channel CMOS 12-bit analog-to-digital converter with a conversion throughput of 500 KSPS. The converter is based on a successive-approximation register architecture with an internal track-and-hold circuit. It can be configured to accept up to seven input signals on pins AIN1 through AIN7.
The output serial data is straight binary, and is compatible with several standards, such as SPI™, QSPI™, MICROWIRE™, and many common DSP serial interfaces.
The ADC78H89 may be operated with independent analog and digital supplies. The analog supply (AVDD) can range from +2.7V to +5.25V, and the digital supply (DVDD) can range from +2.7V to AVDD. Normal power consumption using a +3V or +5V supply is 1.5 mW and 8.3 mW, respectively. The power-down feature reduces the power consumption to just 0.3 µW using a +3V supply, or 0.5 µW using a +5V supply. The ADC78H89 is packaged in a 16-lead TSSOP package. Operation over the industrial temperature range of −40°C to +85°C is ensured.
The ADC78H89 is a low-power, seven-channel CMOS 12-bit analog-to-digital converter with a conversion throughput of 500 KSPS. The converter is based on a successive-approximation register architecture with an internal track-and-hold circuit. It can be configured to accept up to seven input signals on pins AIN1 through AIN7.
The output serial data is straight binary, and is compatible with several standards, such as SPI™, QSPI™, MICROWIRE™, and many common DSP serial interfaces.
The ADC78H89 may be operated with independent analog and digital supplies. The analog supply (AVDD) can range from +2.7V to +5.25V, and the digital supply (DVDD) can range from +2.7V to AVDD. Normal power consumption using a +3V or +5V supply is 1.5 mW and 8.3 mW, respectively. The power-down feature reduces the power consumption to just 0.3 µW using a +3V supply, or 0.5 µW using a +5V supply. The ADC78H89 is packaged in a 16-lead TSSOP package. Operation over the industrial temperature range of −40°C to +85°C is ensured. |
ADC78H908-Channel, 500 KSPS, 12-Bit A/D Converter | Integrated Circuits (ICs) | 2 | Active | The ADC78H90 is a low-power, eight-channel CMOS 12-bit analog-to-digital converter with a conversion throughput of 500 kSPS. The converter is based on a successive-approximation register architecture with an internal track-and-hold circuit. It can be configured to accept up to eight input signals at inputs AIN1 through AIN8.
The output serial data is straight binary, and is compatible with several standards, such as SPI™, QSPI™, MICROWIRE™, and many common DSP serial interfaces.
The ADC78H90 may be operated with independent analog and digital supplies. The analog supply (AVDD) can range from +2.7V to +5.25V, and the digital supply (DVDD) can range from +2.7V to AVDD. Normal power consumption using a +3V or +5V supply is 1.5 mW and 8.3 mW, respectively. The power-down feature reduces the power consumption to just 0.3 µW using a +3V supply, or 0.5 µW using a +5V supply.
The ADC78H90 is packaged in a 16-lead TSSOP package. Operation over the industrial temperature range of −40°C to +85°C is ensured.
The ADC78H90 is a low-power, eight-channel CMOS 12-bit analog-to-digital converter with a conversion throughput of 500 kSPS. The converter is based on a successive-approximation register architecture with an internal track-and-hold circuit. It can be configured to accept up to eight input signals at inputs AIN1 through AIN8.
The output serial data is straight binary, and is compatible with several standards, such as SPI™, QSPI™, MICROWIRE™, and many common DSP serial interfaces.
The ADC78H90 may be operated with independent analog and digital supplies. The analog supply (AVDD) can range from +2.7V to +5.25V, and the digital supply (DVDD) can range from +2.7V to AVDD. Normal power consumption using a +3V or +5V supply is 1.5 mW and 8.3 mW, respectively. The power-down feature reduces the power consumption to just 0.3 µW using a +3V supply, or 0.5 µW using a +5V supply.
The ADC78H90 is packaged in a 16-lead TSSOP package. Operation over the industrial temperature range of −40°C to +85°C is ensured. |
| Data Acquisition | 4 | Obsolete | |
| Analog to Digital Converters (ADC) | 5 | Active | |
