| Integrated Circuits (ICs) | 4 | Active | |
74ALS202-ch, 4-input, 4.5-V to 5.5-V bipolar NAND gates | Logic | 5 | Active | These devices contain two independent 4-input positive-NAND gates. They perform the Boolean functionsor\ in positive logic.
The SN54ALS20A and SN54AS20 are characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ALS20A and SN74AS20 are characterized for operation from 0°C to 70°C.
These devices contain two independent 4-input positive-NAND gates. They perform the Boolean functionsor\ in positive logic.
The SN54ALS20A and SN54AS20 are characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ALS20A and SN74AS20 are characterized for operation from 0°C to 70°C. |
74ALS212-ch, 4-input, 4.5-V to 5.5-V ultra-high-speed (4 ns) bipolar AND gate | Integrated Circuits (ICs) | 1 | Active | These devices contain two independent 4-input positive-AND gates. They perform the Boolean functionsorin positive logic.
The SN54ALS21A and SN54AS21 are characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ALS21A and SN74AS21 are characterized for operation from 0°C to 70°C.
These devices contain two independent 4-input positive-AND gates. They perform the Boolean functionsorin positive logic.
The SN54ALS21A and SN54AS21 are characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ALS21A and SN74AS21 are characterized for operation from 0°C to 70°C. |
| Logic | 2 | Active | |
| Logic | 1 | Active | |
| Buffers, Drivers, Receivers, Transceivers | 1 | Active | |
| Logic | 2 | Obsolete | |
| Integrated Circuits (ICs) | 2 | Active | |
| Integrated Circuits (ICs) | 4 | Active | This 64-bit memory features high speed and fast fall-through times. It is organized as 16 words by 4 bits.
A first-in, first-out (FIFO) memory is a storage device that allows data to be written into and read from its array at independent data rates. This FIFO is designed to process data at rates up to 40MHz in a bit-parallel format, word by word.
Data is written into memory on a low-to-high transition at the load-clock (LDCK) input and is read out on a low-to-high transition at the unload-clock (UNCK) input. The memory is full when the number of words clocked in exceeds by 16 the number of words clocked out. When the memory is full, LDCK signals have no effect on the data residing in memory. When the memory is empty, UNCK signals have no effect.
Status of the FIFO memory is monitored by the FULL\ and EMPTY\ output flags. The FULL\ output is low when the memory is full and high when it is not full. The EMPTY\ output is low when the memory is empty and high when it is not empty.
A low level on the reset (RST\) input resets the internal stack-control pointers and also sets EMPTY\ low and sets FULL\ high. The Q outputs are not reset to any specific logic level. The first low-to-high transition on LDCK, after either a RST\ pulse or from an empty condition, causes EMPTY\ to go high and the data to appear on the Q outputs. It is important to note that the first word does not have to be unloaded. Data outputs are noninverting with respect to the data inputs and are at high impedance when the output-enable (OE) input is low. OE does not affect the FULL\ or EMPTY\ output flags. Cascading is easily accomplished in the word-width direction but is not possible in the word-depth direction.
The SN74ALS232B is characterized for operation from 0°C to 70°C.
This 64-bit memory features high speed and fast fall-through times. It is organized as 16 words by 4 bits.
A first-in, first-out (FIFO) memory is a storage device that allows data to be written into and read from its array at independent data rates. This FIFO is designed to process data at rates up to 40MHz in a bit-parallel format, word by word.
Data is written into memory on a low-to-high transition at the load-clock (LDCK) input and is read out on a low-to-high transition at the unload-clock (UNCK) input. The memory is full when the number of words clocked in exceeds by 16 the number of words clocked out. When the memory is full, LDCK signals have no effect on the data residing in memory. When the memory is empty, UNCK signals have no effect.
Status of the FIFO memory is monitored by the FULL\ and EMPTY\ output flags. The FULL\ output is low when the memory is full and high when it is not full. The EMPTY\ output is low when the memory is empty and high when it is not empty.
A low level on the reset (RST\) input resets the internal stack-control pointers and also sets EMPTY\ low and sets FULL\ high. The Q outputs are not reset to any specific logic level. The first low-to-high transition on LDCK, after either a RST\ pulse or from an empty condition, causes EMPTY\ to go high and the data to appear on the Q outputs. It is important to note that the first word does not have to be unloaded. Data outputs are noninverting with respect to the data inputs and are at high impedance when the output-enable (OE) input is low. OE does not affect the FULL\ or EMPTY\ output flags. Cascading is easily accomplished in the word-width direction but is not possible in the word-depth direction.
The SN74ALS232B is characterized for operation from 0°C to 70°C. |
| FIFOs Memory | 3 | Active | |
