STMicroelectronics

The STM32WBA5xxx multiprotocol wireless and ultra-low power devices embed a powerful and ultra-low power radio compliant with the Bluetooth®SIG Low Energy specification 5.4. They operate at a frequency of up to 100 MHz. The devices integrate a 2.4 GHz RADIO supporting Bluetooth Low Energy, and make possible to use proprietary protocols. The STM32WBA5xxx are based on a high-performance Arm Cortex-M33 32-bit RISC core, featuring a single-precision floating-point unit (FPU), supporting all the Arm single-precision data-processing instructions and all the data types. This core also implements a full set of DSP (digital signal processing) instructions and a memory protection unit (MPU) that enhances the application security. The devices embed high-speed memories (up to 1 Mbyte of flash memory and up to 128 Kbytes of SRAM), an extensive range of enhanced I/Os and peripherals connected to AHB and APB buses on the 32-bit multi-AHB bus matrix. The devices offer security foundation compliant with the TBSA (trusted-based security architecture) requirements from Arm. It embeds the necessary security features to implement a secure boot, secure data storage, and secure firmware update. Besides these capabilities, the devices incorporate a secure firmware installation feature that allows the customer to secure the provisioning of the code during its production. A flexible life cycle is managed thanks to multiple levels readout protection and debug unlock with password. Firmware hardware isolation is supported thanks to securable peripherals, memories and I/Os, and privilege configuration of peripherals and memories. Several protection mechanisms are available for embedded flash memory and SRAM, namely readout and write protection, secure, and hide protection areas. The devices embed several peripherals reinforcing security: a fast AES coprocessor, a secure AES coprocessor with DPA resistance and hardware unique key that can be shared by hardware with fast AES,a PKA (public key accelerator) with DPA resistance, a HASH hardware accelerator, and a true random number generator. Active tamper detection and protection against transient perturbation attacks, is achieved thanks to several internal monitoring generating secret data erase in case of attack. This helps to fit the PCI requirements for point of sales applications. Hardware semaphores enable the synchronization between software processes. The devices offer one 12-bit ADC (2.5 Msps), two comparators, a low-power RTC, one 32-bit general-purpose timer, one 16-bit PWM timer for motor control, three 16-bit general-purpose timers, and two 16-bit low-power timers. They also feature standard and advanced communication interfaces, namely two I2Cs, two SPIs, one SAI, two USARTs, and one low-power UART. The feature set is product-dependent. The STM32WBA5xxx operate in the -40 to 105°C (120°C junction) temperature range from a 1.71 to 3.6 V power supply. The design of low-power applications is enabled by a comprehensive set of power-saving modes. Many peripherals (including radio, communication, analog, and timer peripherals) can be functional and autonomous in Stop mode with direct memory access thanks to BAM (background autonomous mode) support. Some independent power supplies are supported, like an analog independent supply input for ADC and comparators, and radio dedicated supply inputs for the 2.4 GHz RADIO. The STM32WBA5xxx devices offer three packages, up to 59 pins, with or without SMPS.

The STM32WBA5xxx multiprotocol wireless and ultra-low power devices embed a powerful and ultra-low power radio compliant with the Bluetooth®SIG Low Energy specification 5.4. They operate at a frequency of up to 100 MHz. The devices integrate a 2.4 GHz RADIO supporting Bluetooth Low Energy, and make possible to use proprietary protocols. The STM32WBA5xxx are based on a high-performance Arm Cortex-M33 32-bit RISC core, featuring a single-precision floating-point unit (FPU), supporting all the Arm single-precision data-processing instructions and all the data types. This core also implements a full set of DSP (digital signal processing) instructions and a memory protection unit (MPU) that enhances the application security. The devices embed high-speed memories (up to 1 Mbyte of flash memory and up to 128 Kbytes of SRAM), an extensive range of enhanced I/Os and peripherals connected to AHB and APB buses on the 32-bit multi-AHB bus matrix. The devices offer security foundation compliant with the TBSA (trusted-based security architecture) requirements from Arm. It embeds the necessary security features to implement a secure boot, secure data storage, and secure firmware update. Besides these capabilities, the devices incorporate a secure firmware installation feature that allows the customer to secure the provisioning of the code during its production. A flexible life cycle is managed thanks to multiple levels readout protection and debug unlock with password. Firmware hardware isolation is supported thanks to securable peripherals, memories and I/Os, and privilege configuration of peripherals and memories. Several protection mechanisms are available for embedded flash memory and SRAM, namely readout and write protection, secure, and hide protection areas. The devices embed several peripherals reinforcing security: a fast AES coprocessor, a secure AES coprocessor with DPA resistance and hardware unique key that can be shared by hardware with fast AES,a PKA (public key accelerator) with DPA resistance, a HASH hardware accelerator, and a true random number generator. Active tamper detection and protection against transient perturbation attacks, is achieved thanks to several internal monitoring generating secret data erase in case of attack. This helps to fit the PCI requirements for point of sales applications. Hardware semaphores enable the synchronization between software processes. The devices offer one 12-bit ADC (2.5 Msps), two comparators, a low-power RTC, one 32-bit general-purpose timer, one 16-bit PWM timer for motor control, three 16-bit general-purpose timers, and two 16-bit low-power timers. They also feature standard and advanced communication interfaces, namely two I2Cs, two SPIs, one SAI, two USARTs, and one low-power UART. The feature set is product-dependent. The STM32WBA5xxx operate in the -40 to 105°C (120°C junction) temperature range from a 1.71 to 3.6 V power supply. The design of low-power applications is enabled by a comprehensive set of power-saving modes. Many peripherals (including radio, communication, analog, and timer peripherals) can be functional and autonomous in Stop mode with direct memory access thanks to BAM (background autonomous mode) support. Some independent power supplies are supported, like an analog independent supply input for ADC and comparators, and radio dedicated supply inputs for the 2.4 GHz RADIO. The STM32WBA5xxx devices offer three packages, up to 59 pins, with or without SMPS.

The STM32WLE5/E4xx long-range wireless and ultra-low-power devices embed a powerful and ultra-low-power LPWAN-compliant radio solution, enabling the following modulations: LoRa®, (G)FSK, (G)MSK, and BPSK. The LoRa®modulation is available in STM32WLx5xx only. These devices are designed to be extremely low-power and are based on the high-performance Arm®Cortex®-M4 32-bit RISC core operating at a frequency of up to 48 MHz. This core implements a full set of DSP instructions and an independent memory protection unit (MPU) that enhances the application security. The devices embed high-speed memories (flash memory up to 256 Kbytes, SRAM up to 64 Kbytes), and an extensive range of enhanced I/Os and peripherals. The devices also embed several protection mechanisms for embedded flash memory and SRAM: readout protection, write protection and proprietary code readout protection. These devices offer a 12-bit ADC, a 12-bit DAC low-power sample-and-hold, two ultra-low-power comparators associated with a high-accuracy reference voltage generator. The devices embed a low-power RTC with a 32-bit sub-second wakeup counter, one 16-bit single-channel timer, two 16-bit four-channel timers (supporting motor control), one 32-bit four-channel timer and three 16-bit ultra-low-power timers. These devices also embed two DMA controllers (7 channels each) allowing any transfer combination between memory (flash memory, SRAM1 and SRAM2) and peripheral, using the DMAMUX1 for flexible DMA channel mapping. The devices also feature the following standard and advanced communication interfaces:two USARTs (supporting LIN, smartcard, IrDA, modem control and ISO7816), one low-power UART (LPUART), three I2Cs (SMBus/PMBus), two SPIs (up to 16 MHz, one supporting I2S), semaphores for processor firmware process synchronization. The operating temperature/voltage ranges are –40 °C to +105 °C (+85 °C with radio) from a 1.8 V to 3.6 V power supply. A comprehensive set of power-saving modes allows the design of low-power applications. The devices integrate a high-efficiency SMPS step-down converter and independent power supplies for ADC, DAC and comparator analog inputs. A VBATdedicated supply allows the LSE 32.768 kHz oscillator, the RTC and the backup registers to be backed up. The devices can maintain these functions even if the main VDDis not present, through a CR2032-like battery, a supercap or a small rechargeable battery.

The STM32WL33xx is a high performance ultra-low power wireless application processor, intended for RF wireless applications in the sub-1 GHz band. It is designed to operate in both the license-free ISM and SRD frequency bands such as 433, 868, and 915 MHz. It adopts a single-core architecture embedding an Arm® 32-bit Cortex®-M0+ CPU that can operate up to 64 MHz. It integrates high-speed and flexible memory types: up to 256 Kbyte flash memory, and up to 32 Kbyte RAM, one-time programmable (OTP) memory area of 1 Kbyte. The STM32WL33xx embeds a wide set of peripherals, including a 20-pin (16 segments + 4 commons) LCD driver, 12-bit, 8 channel ADC, analog comparator, DAC, LC sensor controller, RTC, IWDG, general purpose timers, AES-128, RNG, CRC, communication interfaces such as USART, SPI, and I2C. Moreover, the security features enable secure boot with USART/SWD block (write protection) and sensitive information storage in flash (read-out protection). Direct data transfer between memory and peripherals and from memory-to-memory is supported by seven DMA channels with fully-flexible channel mapping by the DMAMUX peripheral. It can be configured to support standalone or network processor applications. In the first configuration, the STM32WL33xx operates as single device in the application for managing both the application code and proprietary sub-1 GHz protocol stacks. It operates in the -40 to +105 °C temperature range from a 1.7 V to 3.6 V power supply. A comprehensive set of power-saving modes enables the design of low-power applications. The integrated highly efficient SMPS step-down converter together with the state transition speed between low-power and active states minimize in every condition the average current consumption enabling the STM32WL33xx to be the wireless application processor most suited for battery-operated applications. The STM32WL33xx comes in different package versions supporting up to 32 I/Os for the VFQFPN48 package and 17 I/Os for the VFQFPN32 package.

The STM32WL33xx is a high performance ultra-low power wireless application processor, intended for RF wireless applications in the sub-1 GHz band. It is designed to operate in both the license-free ISM and SRD frequency bands such as 433, 868, and 915 MHz. It adopts a single-core architecture embedding an Arm® 32-bit Cortex®-M0+ CPU that can operate up to 64 MHz. It integrates high-speed and flexible memory types: up to 256 Kbyte flash memory, and up to 32 Kbyte RAM, one-time programmable (OTP) memory area of 1 Kbyte. The STM32WL33xx embeds a wide set of peripherals, including a 20-pin (16 segments + 4 commons) LCD driver, 12-bit, 8 channel ADC, analog comparator, DAC, LC sensor controller, RTC, IWDG, general purpose timers, AES-128, RNG, CRC, communication interfaces such as USART, SPI, and I2C. Moreover, the security features enable secure boot with USART/SWD block (write protection) and sensitive information storage in flash (read-out protection). Direct data transfer between memory and peripherals and from memory-to-memory is supported by seven DMA channels with fully-flexible channel mapping by the DMAMUX peripheral. It can be configured to support standalone or network processor applications. In the first configuration, the STM32WL33xx operates as single device in the application for managing both the application code and proprietary sub-1 GHz protocol stacks. It operates in the -40 to +105 °C temperature range from a 1.7 V to 3.6 V power supply. A comprehensive set of power-saving modes enables the design of low-power applications. The integrated highly efficient SMPS step-down converter together with the state transition speed between low-power and active states minimize in every condition the average current consumption enabling the STM32WL33xx to be the wireless application processor most suited for battery-operated applications. The STM32WL33xx comes in different package versions supporting up to 32 I/Os for the VFQFPN48 package and 17 I/Os for the VFQFPN32 package.

The STM32WL33xx is a high performance ultra-low power wireless application processor, intended for RF wireless applications in the sub-1 GHz band. It is designed to operate in both the license-free ISM and SRD frequency bands such as 433, 868, and 915 MHz. It adopts a single-core architecture embedding an Arm® 32-bit Cortex®-M0+ CPU that can operate up to 64 MHz. It integrates high-speed and flexible memory types: up to 256 Kbyte flash memory, and up to 32 Kbyte RAM, one-time programmable (OTP) memory area of 1 Kbyte. The STM32WL33xx embeds a wide set of peripherals, including a 20-pin (16 segments + 4 commons) LCD driver, 12-bit, 8 channel ADC, analog comparator, DAC, LC sensor controller, RTC, IWDG, general purpose timers, AES-128, RNG, CRC, communication interfaces such as USART, SPI, and I2C. Moreover, the security features enable secure boot with USART/SWD block (write protection) and sensitive information storage in flash (read-out protection). Direct data transfer between memory and peripherals and from memory-to-memory is supported by seven DMA channels with fully-flexible channel mapping by the DMAMUX peripheral. It can be configured to support standalone or network processor applications. In the first configuration, the STM32WL33xx operates as single device in the application for managing both the application code and proprietary sub-1 GHz protocol stacks. It operates in the -40 to +105 °C temperature range from a 1.7 V to 3.6 V power supply. A comprehensive set of power-saving modes enables the design of low-power applications. The integrated highly efficient SMPS step-down converter together with the state transition speed between low-power and active states minimize in every condition the average current consumption enabling the STM32WL33xx to be the wireless application processor most suited for battery-operated applications. The STM32WL33xx comes in different package versions supporting up to 32 I/Os for the VFQFPN48 package and 17 I/Os for the VFQFPN32 package.

The STM32WL33xx is a high performance ultra-low power wireless application processor, intended for RF wireless applications in the sub-1 GHz band. It is designed to operate in both the license-free ISM and SRD frequency bands such as 433, 868, and 915 MHz. It adopts a single-core architecture embedding an Arm® 32-bit Cortex®-M0+ CPU that can operate up to 64 MHz. It integrates high-speed and flexible memory types: up to 256 Kbyte flash memory, and up to 32 Kbyte RAM, one-time programmable (OTP) memory area of 1 Kbyte. The STM32WL33xx embeds a wide set of peripherals, including a 20-pin (16 segments + 4 commons) LCD driver, 12-bit, 8 channel ADC, analog comparator, DAC, LC sensor controller, RTC, IWDG, general purpose timers, AES-128, RNG, CRC, communication interfaces such as USART, SPI, and I2C. Moreover, the security features enable secure boot with USART/SWD block (write protection) and sensitive information storage in flash (read-out protection). Direct data transfer between memory and peripherals and from memory-to-memory is supported by seven DMA channels with fully-flexible channel mapping by the DMAMUX peripheral. It can be configured to support standalone or network processor applications. In the first configuration, the STM32WL33xx operates as single device in the application for managing both the application code and proprietary sub-1 GHz protocol stacks. It operates in the -40 to +105 °C temperature range from a 1.7 V to 3.6 V power supply. A comprehensive set of power-saving modes enables the design of low-power applications. The integrated highly efficient SMPS step-down converter together with the state transition speed between low-power and active states minimize in every condition the average current consumption enabling the STM32WL33xx to be the wireless application processor most suited for battery-operated applications. The STM32WL33xx comes in different package versions supporting up to 32 I/Os for the VFQFPN48 package and 17 I/Os for the VFQFPN32 package.