STM63215-pin supervisor with watchdog timer and push-button reset | PMIC | 5 | Active | The STM6xxx supervisors are self-contained devices which provide microprocessor supervisory functions. A precision voltage reference and comparator monitors the VCCinput for an out-of-tolerance condition. When an invalid VCCcondition occurs, the reset output (RST) is forced low (or high in the case of RST). These devices also offer a watchdog timer (except for STM6322/6825) and/or a push-button (MR) reset input.
These devices are available in a standard 5-pin SOT23 package. |
STM63225-pin supervisor with watchdog timer and push-button reset | Power Management (PMIC) | 2 | Active | The STM6xxx supervisors are self-contained devices which provide microprocessor supervisory functions. A precision voltage reference and comparator monitors the VCCinput for an out-of-tolerance condition. When an invalid VCCcondition occurs, the reset output (RST) is forced low (or high in the case of RST). These devices also offer a watchdog timer (except for STM6322/6825) and/or a push-button (MR) reset input.
These devices are available in a standard 5-pin SOT23 package. |
STM6503Dual push-button smart reset with user-adjustable setup delays | Power Management (PMIC) | 1 | Active | STM6502 has two combined Smart Reset inputs (SR0andSR1) with delayed Smart Reset setup time (tSRC) programmed by an external capacitor on the SRC pin.
STM6503 is similar to STM6502, has two combined delayed Smart Reset inputs (SR0,SR1) and three user-selectable delayed Smart Reset setup time (tSRC) options of 2 s, 6 s and 10 s through a three-state TSR input pin: when connected to ground, tSRC= 2 s; when left open, tSRC= 6 s; when connected to VCC, tSRC= 10 s (all the times are minimum).
STM6504 has two independent Smart Reset inputs.SR0provides the delayed Smart Reset setup time (tSRC) function with three user-selectable tSRCoptions through a three-state TSR input pin: when connected to ground, tSRC= 2 s; when left open, tSRC= 6 s; when connected to VCC, tSRC= 10 s (all the times are minimum). SRE provides instant reset. SRE is edge-triggered with a special debounce time (tDEBOUNCE= 240 ms min.) at the falling edge after a valid reset period.
STM6505 has two combined delayed Smart Reset inputs (SR0,SR1) and provides an adjustable reset delay setup time via an external capacitor connected to the SRC pin. TheRSToutput depends also on the VCCmonitoring threshold. STM6505 also provides independent low battery detect (BLD) output controlled by the secondary external input voltage VBAT. VBATis monitored for low voltage and provides an indication on the battery low detect output pin (BLD). VBATthreshold is 1.25 V, fixed, and an external resistor divider is to be used to set the actual battery voltage threshold. VBATthreshold hysteresis is 8 mV typ. (16 mV max.). VBATis voltage monitoring input only, the device is powered only from the VCCpin; VCCmust be ≥ 1.575 V for proper operation of the VBATcomparator. |
| Integrated Circuits (ICs) | 1 | Obsolete | |
STM6510Dual push-button Smart Reset with capacitor-adjustable delays | PMIC | 3 | Active | The STM6510 has two combined Smart Reset inputs (SR0andSR1) with Smart Reset setup delay (tSRC) programmed by an external capacitor on the SRC pin. An additional STM6510 feature is adjustable output reset pulse time tRECby adding an external capacitor (CtREC).
Additionally, the VCCis monitored and if it drops below the selected VRSTthreshold, the reset output goes active and remains active while VCCis below the VRSTthreshold, plus the defined duration of the reset pulse tREC. |
STM6520Dual push-button Smart Reset with push-button controlled output delay | Integrated Circuits (ICs) | 1 | Active | The Smart Reset™ devices provide a useful feature that ensures inadvertent short reset push-button closures do not cause system resets. This is done by implementing extended Smart Reset™ input delay time (tSRC) and combined push-button inputs, which together ensures a safe reset and eliminates the need for a specific dedicated reset button.
This reset configuration provides versatility and allows the application to discriminate between a software generated interrupt and a hard system reset. When the input push-buttons are connected to microcontroller interrupt inputs, and are closed for a short time, the processor can only be interrupted. If the system still does not respond properly, continuing to keep the push-buttons closed for the extended setup time tSRCcauses a hard reset of the processor through the reset outputs.
The STM6520 has two combined delayed Smart Reset™ inputs (SR0,SR1) with two user-selectable delayed Smart Reset™ setup time (tSRC) options of 7.5 s and 12.5 s typ., selected by a dual-state Smart Reset™ DSR input pin. When DSR is connected to ground, tSRC= 7.5 s, when connected to VCC, tSRC= 12.5 s (typ.). There are two reset outputs, both going active simultaneously after both of the Smart Reset™ inputs were held active for the selected tSRCdelay time. The outputs remain asserted until either or both inputs go to inactive logic level (for this device the output reset pulse duration is fully push-button controlled, meaning neither fixed nor minimum reset pulse width, nor power-on reset pulse is implemented). The first reset output,RST1, is active-low, open-drain; the second reset output, RST2, is active-high, push-pull. The device fully operates over a broad VCCrange 1.65 to 5.5 V. Below 1.575 V typ. the inputs are ignored and outputs are deasserted; the deasserted reset output levels are then valid down to 1.0 V. |
STM6522Dual push-button Smart Reset with capacitor-adjustable setup delay | Supervisors | 1 | Active | The Smart Reset™ devices provide a useful feature that ensures that inadvertent short reset push-button closures do not cause system resets as the extended Smart Reset™ delay setup periods are implemented. Once the valid Smart Reset™ input levels and setup delay are met, the device generates an output reset pulse for a fixed timeout period (tREC).
The typical application hookup shows that either a single Smart Reset™ input, or both reset inputs can be connected to the applications interrupt and control both the interrupt pin and the hard reset functions. If the push-button is closed for a short time, the processor is only interrupted. If the system still does not respond properly, holding the push-button(s) for the extended setup time (tSRC) causes a hard reset of the processor. The Smart Reset™ feature helps significantly increase system stability and eliminates the need for a dedicated reset button.
The STM65xx family of Smart Reset™ devices consists of low-current microprocessor reset circuits targeted at applications such as MP3 players, portable navigation or mobile phones, generally any application that requires delayed reset push-button(s) response for improved system stability. The devices in the STM65xx Smart Reset™ family include various combinations of useful features for the targeted applications.
The STM6522 has two combined Smart Reset™ inputs (SR0andSR1) with delayed reset setup time (tSRC) programmed by an external capacitor on the SRC pin. |
| Power Management (PMIC) | 1 | Active | The Smart Reset™ devices provide a useful feature that ensures inadvertent short reset push-button closures do not cause system resets. This is done by implementing extended Smart Reset™ input delay time (tSRC) and combined push-button inputs, which together ensures a safe reset and eliminates the need for a specific dedicated reset button.
This reset configuration provides versatility and allows the application to distinguish between a software generated interrupt and a hard system reset. When the input push-buttons are connected to microcontroller interrupt inputs, and are closed for a short time, the processor can only be interrupted. If the system still does not respond properly, continuing to keep the push-buttons closed for the extended setup time tSRCcauses a hard reset of the processor through the reset output.
The STM6524 has two combined delayed Smart Reset™ inputs (SR0,SR1) with preset delayed Smart Reset™ setup time (tSRC). The reset output is asserted after both of the Smart Reset™ inputs were held active for the selected tSRCdelay time. Depending on selected option theRSToutput remains asserted either until at least oneSRinput goes to inactive logic level (i.e. neither fixed nor minimum reset pulse width is set) or the output reset pulse duration is fixed for tREC(i.e. factory-programmed). The reset output,RST, is active low or active high, push-pull or open drain with optional pull-up resistor. The device fully operates over a broad VCCrange 1.65 V to 5.5 V. Below 1.575 V typ. the inputs are ignored and outputs are deasserted; the deasserted reset output levels are then valid down to 1.0 V. |
STM6600Smart push-button on/off controller with Smart Reset and power-on lockout | Integrated Circuits (ICs) | 5 | Active | The STM6600-01 devices monitor the state of connected push-button(s) as well as sufficient supply voltage. An enable output controls power for the application through the MOSFET transistor, DC-DC converter, regulator, etc. If the supply voltage is above a precise voltage threshold, the enable output can be asserted by a simple press of the button. Factory-selectable supply voltage thresholds are determined by highly accurate and temperature-compensated references. An interrupt is asserted by pressing the push-button during normal operation and can be used to request a system power-down. The interrupt is also asserted if undervoltage is detected. By a long push of one button (PB) or two buttons (PBandSR) either a reset is asserted or power for the application is disabled depending on the option used.
The device also offers additional features such as precise 1.5 V voltage reference with very tight accuracy of 1%, separate output indicating undervoltage detection and separate output for distinguishing between interrupt by push-button or undervoltage.
The device consumes very low current of 6 μA during normal operation and only 0.6 μA current during standby.
The STM6600-01 is available in the TDFN12 package and is offered in several options among features such as selectable threshold, hysteresis, timeouts, output types, etc. |
STM6601Smart push-button on/off controller with Smart Reset and power-on lockout | PMIC | 4 | Active | The STM6600-01 devices monitor the state of connected push-button(s) as well as sufficient supply voltage. An enable output controls power for the application through the MOSFET transistor, DC-DC converter, regulator, etc. If the supply voltage is above a precise voltage threshold, the enable output can be asserted by a simple press of the button. Factory-selectable supply voltage thresholds are determined by highly accurate and temperature-compensated references. An interrupt is asserted by pressing the push-button during normal operation and can be used to request a system power-down. The interrupt is also asserted if undervoltage is detected. By a long push of one button (PB) or two buttons (PBandSR) either a reset is asserted or power for the application is disabled depending on the option used.
The device also offers additional features such as precise 1.5 V voltage reference with very tight accuracy of 1%, separate output indicating undervoltage detection and separate output for distinguishing between interrupt by push-button or undervoltage.
The device consumes very low current of 6 μA during normal operation and only 0.6 μA current during standby.
The STM6600-01 is available in the TDFN12 package and is offered in several options among features such as selectable threshold, hysteresis, timeouts, output types, etc. |
