| Microprocessors | 3 | Active | The STM32MP133C/F devices are based on the high-performance Arm®Cortex®-A7 32-bit RISC core operating at up to 1 GHz. The Cortex®-A7 processor includes a 32-Kbyte L1 instruction cache, a 32-Kbyte L1 data cache and a 128-Kbyte level2 cache. The Cortex®-A7 processor is a very energy-efficient application processor designed to provide rich performance in high-end wearables, and other low-power embedded and consumer applications. It provides up to 20 % more single thread performance than the Cortex®-A5 and provides similar performance to the Cortex®A9.
The Cortex®-A7 incorporates all features of the high-performance Cortex®-A15 and Cortex®-A17 processors, including virtualization support in hardware, NEON™, and 128-bit AMBA®4 AXI bus interface.
The STM32MP133C/F devices provide an external SDRAM interface supporting external memories up to 8-Gbit density (1 Gbyte), 16-bit LPDDR2/LPDDR3 or DDR3/DDR3L up to 533 MHz.
The STM32MP133C/F devices incorporate high-speed embedded memories with 168 Kbytes of internal SRAM (including 128 Kbytes of AXI SYSRAM, two banks of 8 Kbytes and one bank of 16 Kbytes securable AHB SRAM, and 8 Kbytes of SRAM in Backup domain), as well as an extensive range of enhanced I/Os and peripherals connected to APB buses, AHB buses, and a 64-bit multi-layer AXI interconnect supporting internal and external memories access.
All the devices offer two ADCs, a low-power secured RTC, ten general-purpose 16-bit timers, two 32-bit timers, two PWM timers for motor control, five low-power timers, a secured true random number generator (RNG), and an advanced secured cryptographic acceleration cell. The devices support two digital filters for external sigma-delta modulators (DFSDM). They also feature standard and advanced communication interfaces. |
STM32MP135C32-bit Arm Cortex-A7 650MHz MPU for Industrial, Graphics and Security | Integrated Circuits (ICs) | 1 | Active | The STM32MP135C/F devices are based on the high-performance Arm®Cortex®-A7 32-bit RISC core operating at up to 1 GHz. The Cortex®-A7 processor includes a 32-Kbyte L1 instruction cache, a 32-Kbyte L1 data cache and a 128-Kbyte level2 cache. The Cortex®-A7 processor is a very energy-efficient application processor designed to provide rich performance in high-end wearables, and other low-power embedded and consumer applications. It provides up to 20 % more single thread performance than the Cortex®-A5 and provides similar performance to the Cortex®A9.
The Cortex®-A7 incorporates all features of the high-performance Cortex®-A15 and Cortex®-A17 processors, including virtualization support in hardware, NEON™, and 128-bit AMBA®4 AXI bus interface.
The STM32MP135C/F devices provide an external SDRAM interface supporting external memories up to 8-Gbit density (1 Gbyte), 16-bit LPDDR2/LPDDR3 or DDR3/DDR3L up to 533 MHz.
The STM32MP135C/F devices incorporate high-speed embedded memories with 168 Kbytes of internal SRAM (including 128 Kbytes of AXI SYSRAM, two banks of 8 Kbytes and one bank of 16 Kbytes securable AHB SRAM, and 8 Kbytes of SRAM in Backup domain), as well as an extensive range of enhanced I/Os and peripherals connected to APB buses, AHB buses, and a 64-bit multi-layer AXI interconnect supporting internal and external memories access.
All the devices offer two ADCs, a low-power secured RTC, ten general-purpose 16-bit timers, two 32-bit timers, two PWM timers for motor control, five low-power timers, a secured true random number generator (RNG), and an advanced secured cryptographic acceleration cell. The devices support two digital filters for external sigma-delta modulators (DFSDM). They also feature standard and advanced communication interfaces. |
| Microprocessors | 1 | Active | The STM32MP135A/D devices are based on the high-performance Arm®Cortex®-A7 32-bit RISC core operating at up to 1 GHz. The Cortex®-A7 processor includes a 32-Kbyte L1 instruction cache, a 32-Kbyte L1 data cache and a 128-Kbyte level2 cache. The Cortex®-A7 processor is a very energy-efficient application processor designed to provide rich performance in high-end wearables, and other low-power embedded and consumer applications. It provides up to 20 % more single thread performance than the Cortex®-A5 and provides similar performance to the Cortex®A9.
The Cortex®-A7 incorporates all features of the high-performance Cortex®-A15 and Cortex®-A17 processors, including virtualization support in hardware, NEON™, and 128-bit AMBA®4 AXI bus interface.
The STM32MP135A/D devices provide an external SDRAM interface supporting external memories up to 8-Gbit density (1 Gbyte), 16-bit LPDDR2/LPDDR3 or DDR3/DDR3L up to 533 MHz.
The STM32MP135A/D devices incorporate high-speed embedded memories with 168 Kbytes of internal SRAM (including 128 Kbytes of AXI SYSRAM, two banks of 8 Kbytes and one bank of 16 Kbytes securable AHB SRAM, and 8 Kbytes of SRAM in Backup domain), as well as an extensive range of enhanced I/Os and peripherals connected to APB buses, AHB buses, and a 64-bit multi-layer AXI interconnect supporting internal and external memories access.
All the devices offer two ADCs, a low-power secured RTC, ten general-purpose 16-bit timers, two 32-bit timers, two PWM timers for motor control, five low-power timers, a secured true random number generator (RNG). The devices support two digital filters for external sigma-delta modulators (DFSDM). They also feature standard and advanced communication interfaces. |
STM32MP135F32-bit Arm Cortex-A7 1GHz MPU for Graphics and Security | Microprocessors | 4 | Active | The STM32MP135C/F devices are based on the high-performance Arm®Cortex®-A7 32-bit RISC core operating at up to 1 GHz. The Cortex®-A7 processor includes a 32-Kbyte L1 instruction cache, a 32-Kbyte L1 data cache and a 128-Kbyte level2 cache. The Cortex®-A7 processor is a very energy-efficient application processor designed to provide rich performance in high-end wearables, and other low-power embedded and consumer applications. It provides up to 20 % more single thread performance than the Cortex®-A5 and provides similar performance to the Cortex®A9.
The Cortex®-A7 incorporates all features of the high-performance Cortex®-A15 and Cortex®-A17 processors, including virtualization support in hardware, NEON™, and 128-bit AMBA®4 AXI bus interface.
The STM32MP135C/F devices provide an external SDRAM interface supporting external memories up to 8-Gbit density (1 Gbyte), 16-bit LPDDR2/LPDDR3 or DDR3/DDR3L up to 533 MHz.
The STM32MP135C/F devices incorporate high-speed embedded memories with 168 Kbytes of internal SRAM (including 128 Kbytes of AXI SYSRAM, two banks of 8 Kbytes and one bank of 16 Kbytes securable AHB SRAM, and 8 Kbytes of SRAM in Backup domain), as well as an extensive range of enhanced I/Os and peripherals connected to APB buses, AHB buses, and a 64-bit multi-layer AXI interconnect supporting internal and external memories access.
All the devices offer two ADCs, a low-power secured RTC, ten general-purpose 16-bit timers, two 32-bit timers, two PWM timers for motor control, five low-power timers, a secured true random number generator (RNG), and an advanced secured cryptographic acceleration cell. The devices support two digital filters for external sigma-delta modulators (DFSDM). They also feature standard and advanced communication interfaces. |
STM32U073MCUltra-low-power Arm Cortex-M0+ MCU with 256 Kbytes of Flash memory, LCD, USB, 56 MHz CPU | Embedded | 2 | Active | The STM32U073x8/B/C devices are ultra-low-power microcontrollers based on the high-performance Arm®Cortex®-M0+ 32-bit RISC core operating at a frequency of up to 56 MHz.
The STM32U073x8/B/C devices embed high-speed memories (up to 256-Kbyte flash memory and 40-Kbyte SRAM with hardware parity check), and an extensive range of enhanced I/Os and peripherals connected to APB and AHB buses, and a 32-bit multi-AHB bus matrix.
They also embed protection mechanisms for embedded flash memory and SRAM, such as readout protection and write protection.
The STM32U073x8/B/C devices offer a 12-bit ADC, a 12-bit DAC, two embedded rail-to-rail analog comparators, one operational amplifier, a low-power RTC, one general-purpose 32-bit timer, one 16-bit PWM timer dedicated to motor control, three general-purpose 16-bit timers, and three 16-bit low-power timers
The devices also embed up to 21 capacitive sensing channels, plus an integrated LCD controller that enables to drive 8x48 or 4x52 segments with internal step-up converter.
They also feature standard and advanced communication interfaces, namely four I2Cs, three SPIs, four USARTs and three low-power UARTs, plus one crystal-less USB full-speed device.
The STM32U073x8/B/C operate in the -40 to +85 °C (+105 °C junction) and -40 to +125 °C (+130 °C junction) temperature ranges from a 1.71 to 3.6 V VDD power supply using an internal LDO regulator. A comprehensive set of power-saving modes makes possible the design of low-power applications.
Independent power supplies are supported: analog independent supply input for ADC, DAC, OPAMP and comparator, as well as VBAT input allowing the backup of the RTC and backup registers.
The STM32U073x8/B/C offer eight packages from 32 to 81 pins. |
STM32U083CCUltra-low-power Arm Cortex-M0+ MCU with 256 Kbytes of Flash memory, LCD, USB, AES, 56 MHz CPU | Embedded | 3 | Active | The STM32U083xC devices are ultra-low-power microcontrollers based on the high-performance Arm®Cortex®-M0+ 32-bit RISC core operating at a frequency of up to 56 MHz.
The STM32U083xC devices embed high-speed memories (256-Kbyte flash memory and 40-Kbyte SRAM with hardware parity check), and an extensive range of enhanced I/Os and peripherals connected to APB and AHB buses, and a 32-bit multi-AHB bus matrix.
They also embed protection mechanisms for embedded flash memory and SRAM, such as readout protection and write protection.
The STM32U083xC devices offer a 12-bit ADC, a 12-bit DAC, two embedded rail-to-rail analog comparators, one operational amplifier, a low-power RTC, one general-purpose 32-bit timer, one 16-bit PWM timer dedicated to motor control, three general-purpose 16-bit timers, and three 16-bit low-power timers
The devices also embed up to 21 capacitive sensing channels, plus an integrated LCD controller that enables to drive 8x48 or 4x52 segments with internal step-up converter.
They also feature standard and advanced communication interfaces, namely four I2Cs, three SPIs, four USARTs and three low-power UARTs, plus one crystal-less USB full-speed device.
In addition, the STM32U083xC devices embed an AES hardware accelerator.
The STM32U083xC operate in the -40 to +85 °C (+105 °C junction) and -40 to +125 °C (+130 °C junction) temperature ranges from a 1.71 to 3.6 V VDD power supply using an internal LDO regulator. A comprehensive set of power-saving modes makes possible the design of low-power applications.
Independent power supplies are supported: analog independent supply input for ADC, DAC, OPAMP and comparator, as well as VBAT input allowing the backup of the RTC and backup registers.
The STM32U083xC offer eight packages from 32 to 81 pins. |
STM32U535CCUltra-low-power with FPU Arm Cortex-M33 MCU with TrustZone, 160 MHz with 256 Kbytes of Flash memory | Microcontrollers | 20 | Active | The STM32U535xx devices belong to an ultra-low-power microcontrollers family (STM32U5 Series) based on the high-performance Arm®Cortex®-M33 32-bit RISC core. They operate at a frequency of up to 160 MHz.
The Cortex®-M33 core features a single-precision FPU (floating-point unit), that supports all the Arm®single-precision data-processing instructions and all the data types.
The Cortex®-M33 core also implements a full set of DSP (digital signal processing) instructions and a MPU (memory protection unit) that enhances the application security.
The devices embed high-speed memories (up to 512-Kbyte flash memory and 274-Kbyte SRAM), one Octo-SPI flash memory interface, an extensive range of enhanced I/Os, peripherals connected to three APB buses, three AHB buses and a 32-bit multi-AHB bus matrix.
The devices offer security foundation compliant with the TBSA (trusted-based security architecture) requirements from Arm®. It embeds the necessary security features to implement a secure boot, secure data storage and secure firmware update. Besides these capabilities, the devices incorporate a secure firmware installation feature, that allows the customer to secure the provisioning of the code during its production. A flexible lifecycle is managed thanks to multiple levels of readout protection and debug unlock with password. Firmware hardware isolation is supported thanks to securable peripherals, memories and I/Os, and privilege configuration of peripherals and memories.
The devices feature several protection mechanisms for embedded flash memory and SRAM: readout protection, write protection, secure and hide protection areas.
The devices embed several peripherals reinforcing security: with DPA resistance, a HASH hardware accelerator, and a true random number generator.
The devices offer active tamper detection and protection against transient and environmental perturbation attacks, thanks to several internal monitoring generating secret data erase in case of attack. This helps to fit the PCI requirements for point of sales applications.
The devices offer one fast 14-bit ADC (2.5 Msps), one 12-bit ADC (2.5 Msps), one comparator, one operational amplifier, two DAC channels, an internal voltage reference buffer, a low-power RTC, four 32-bit general-purpose timers, two 16-bit PWM timers dedicated to motor control, three 16-bit general-purpose timers, two 16-bit basic timers and four 16-bit low-power timers.
The devices support a MDF (multi-function digital filter) with two filters dedicated to the connection of external sigma-delta modulators. Another low-power digital filter dedicated to audio signals is embedded (ADF), with one filter supporting sound-activity detection. The devices embed also mathematical accelerators (a trigonometric functions accelerator plus a filter mathematical accelerator). In addition, up to 20 capacitive sensing channels are available.
The devices also feature standard and advanced communication interfaces such as: four I2Cs, three SPIs, two USARTs, two UARTs, one low-power UART, one SAI, one digital camera interface (DCMI), one SDMMC, one FDCAN, one USB host and device capable full-speed, and one generic synchronous 8-/16-bit PSSI (parallel data input/output slave interface).
The devices operate in the –40 to +85 °C (+105 °C junction) and –40 to +125 °C (+130 °C junction) temperature ranges from a 1.71 to 3.6 V power supply.
A comprehensive set of power-saving modes allow the design of low-power applications. Many peripherals (including communication, analog, timers and audio peripherals) can be functional and autonomous down to Stop mode with direct memory access, thanks to LPBAM support (low-power background autonomous mode).
Some independent power supplies are supported like an analog independent supply input for ADC, DACs, OPAMPs and comparators, a 3.3 V dedicated supply input for USB and up to 14 I/Os, that can be supplied independently down to 1.08 V. A VBAT input is available for connecting a backup battery in order to preserve the RTC functionality and to backup 32 × 32-bit registers and 2-Kbyte SRAM.
The devices offer eight packages from 48 to 100 pins. |
STM32U575CGUltra-low-power with FPU Arm Cortex-M33 MCU with TrustZone, 160 MHz with 2 Mbytes of Flash memory | Integrated Circuits (ICs) | 16 | Active | The STM32U575xx devices belong to an ultra-low-power microcontrollers family (STM32U5 series) based on the high-performance Arm®Cortex®-M33 32-bit RISC core. They operate at a frequency of up to 160 MHz.
The Cortex®-M33 core features a single-precision FPU (floating-point unit), that supports all the Arm®single-precision data-processing instructions and all the data types.
The Cortex®-M33 core also implements a full set of DSP (digital signal processing) instructions and a MPU (memory protection unit) that enhances the application security.
The devices embed high-speed memories (up to 2 Mbytes of flash memory and 786 Kbytes of SRAM), an FSMC (flexible external memory controller) for static memories (for devices with packages of 90 pins and more), two Octo-SPI flash memory interfaces (at least one Quad-SPI available on all packages) and an extensive range of enhanced I/Os and peripherals connected to three APB buses, three AHB buses and a 32-bit multi-AHB bus matrix.
The devices offer security foundation compliant with the TBSA (trusted-based security architecture) requirements from Arm®. It embeds the necessary security features to implement a secure boot, secure data storage and secure firmware update. Besides these capabilities, the devices incorporate a secure firmware installation feature that allows the customer to secure the provisioning of the code during its production. A flexible lifecycle is managed thanks to multiple levels of readout protection and debug unlock with password. Firmware hardware isolation is supported thanks to securable peripherals, memories and I/Os, and privilege configuration of peripherals and memories.
The devices feature several protection mechanisms for embedded flash memory and SRAM: readout protection, write protection, secure, and hide protection areas.
The devices embed several peripherals reinforcing security: a HASH hardware accelerator, and a true random number generator.
The devices offer active tamper detection and protection against transient and environmental perturbation attacks, thanks to several internal monitoring generating secret data erase in case of attack. This helps to fit the PCI requirements for point of sales applications.
The devices offer one fast 14-bit ADC (2.5 Msps), one 12-bit ADC (2.5 Msps), two comparators, two operational amplifiers, two DAC channels, an internal voltage reference buffer, a low-power RTC, four 32-bit general-purpose timers, two 16-bit PWM timers dedicated to motor control, three 16-bit general-purpose timers, two 16-bit basic timers and four 16-bit low-power timers.
The devices support an MDF (multifunction digital filter) with six filters dedicated to the connection of external sigma-delta modulators. Another low-power digital filter dedicated to audio signals is embedded (ADF), with one filter supporting sound-activity detection. The devices embed also a Chrom-ART Accelerator dedicated to graphic applications, and mathematical accelerators (a trigonometric functions accelerator plus a filter mathematical accelerator). In addition, up to 22 capacitive sensing channels are available.
The devices also feature standard and advanced communication interfaces such as: four I2Cs, three SPIs, three USARTs, two UARTs, one low-power UART, two SAIs, one digital camera interface (DCMI), two SDMMCs, one FDCAN, one USB OTG full-speed, one USB Type-C /USB Power Delivery controller, and one generic synchronous 8-/16-bit PSSI (parallel data input/output slave interface).
The devices operate in the –40 to +85 °C (+105 °C junction) and –40 to +125 °C (+130 °C junction) temperature ranges from a 1.71 to 3.6 V power supply.
A comprehensive set of power-saving modes allow the design of low-power applications. Many peripherals (including communication, analog, timers, and audio peripherals) can be functional and autonomous down to Stop mode with direct memory access, thanks to LPBAM support (low-power background autonomous mode).
Some independent power supplies are supported like an analog independent supply input for ADC, DACs, OPAMPs and comparators, a 3.3 V dedicated supply input for USB and up to 14 I/Os that can be supplied independently down to 1.08 V. A VBAT input is available for connecting a backup battery in order to preserve the RTC functionality and to backup 3232-bit registers and 2-Kbyte SRAM.
The devices offer eight packages from 48 to 169 pins. |
STM32U585CIUltra-low-power with FPU Arm Cortex-M33 MCU with TrustZone, 160 MHz with 2 Mbytes of Flash memory | Integrated Circuits (ICs) | 18 | Active | The STM32U585xx devices belong to an ultra-low-power microcontrollers family (STM32U5 series) based on the high-performance Arm®Cortex®-M33 32-bit RISC core. They operate at a frequency of up to 160 MHz.
The Cortex®-M33 core features a single-precision FPU (floating-point unit), that supports all the Arm®single-precision data-processing instructions and all the data types.
The Cortex®-M33 core also implements a full set of DSP (digital signal processing) instructions and a MPU (memory protection unit) that enhances the application security.
The devices embed high-speed memories (2 Mbytes of flash memory and 786 Kbytes of SRAM), an FSMC (flexible external memory controller) for static memories (for devices with packages of 90 pins and more), two Octo-SPI flash memory interfaces (at least one Quad-SPI available on all packages) and an extensive range of enhanced I/Os and peripherals connected to three APB buses, three AHB buses and a 32-bit multi-AHB bus matrix.
The devices offer security foundation compliant with the TBSA (trusted-based security architecture) requirements from Arm®. It embeds the necessary security features to implement a secure boot, secure data storage and secure firmware update. Besides these capabilities, the devices incorporate a secure firmware installation feature that allows the customer to secure the provisioning of the code during its production. A flexible lifecycle is managed thanks to multiple levels of readout protection and debug unlock with password. Firmware hardware isolation is supported thanks to securable peripherals, memories and I/Os, and privilege configuration of peripherals and memories.
The devices feature several protection mechanisms for embedded flash memory and SRAM: readout protection, write protection, secure, and hide protection areas.
The devices embed several peripherals reinforcing security: a fast AES coprocessor, a secure AES coprocessor with DPA resistance and hardware unique key that can be shared by hardware with fast AES, a PKA (public key accelerator) with DPA resistance, an on-the-fly decryption engine for Octo-SPI external memories, a HASH hardware accelerator, and a true random number generator.
The devices offer active tamper detection and protection against transient and environmental perturbation attacks, thanks to several internal monitoring generating secret data erase in case of attack. This helps to fit the PCI requirements for point of sales applications.
The devices offer one fast 14-bit ADC (2.5 Msps), one 12-bit ADC (2.5 Msps), two comparators, two operational amplifiers, two DAC channels, an internal voltage reference buffer, a low-power RTC, four 32-bit general-purpose timers, two 16-bit PWM timers dedicated to motor control, three 16-bit general-purpose timers, two 16-bit basic timers and four 16-bit low-power timers.
The devices support an MDF (multifunction digital filter) with six filters dedicated to the connection of external sigma-delta modulators. Another low-power digital filter dedicated to audio signals is embedded (ADF), with one filter supporting sound-activity detection. The devices embed also a Chrom-ART Accelerator dedicated to graphic applications, and mathematical accelerators (a trigonometric functions accelerator plus a filter mathematical accelerator). In addition, up to 22 capacitive sensing channels are available.
The devices also feature standard and advanced communication interfaces such as: four I2Cs, three SPIs, three USARTs, two UARTs, one low-power UART, two SAIs, one digital camera interface (DCMI), two SDMMCs, one FDCAN, one USB OTG full-speed, one USB Type-C /USB Power Delivery controller, and one generic synchronous 8-/16-bit PSSI (parallel data input/output slave interface).
The devices operate in the –40 to +85 °C (+105 °C junction) and –40 to +125 °C (+130 °C junction) temperature ranges from a 1.71 to 3.6 V power supply.
A comprehensive set of power-saving modes allow the design of low-power applications. Many peripherals (including communication, analog, timers, and audio peripherals) can be functional and autonomous down to Stop mode with direct memory access, thanks to LPBAM support (low-power background autonomous mode).
Some independent power supplies are supported like an analog independent supply input for ADC, DACs, OPAMPs and comparators, a 3.3 V dedicated supply input for USB and up to 14 I/Os that can be supplied independently down to 1.08 V. A VBAT input is available for connecting a backup battery in order to preserve the RTC functionality and to backup 3232-bit registers and 2-Kbyte SRAM.
The devices offer eight packages from 48 to 169 pins. |
STM32U595VJUltra-low-power with FPU Arm Cortex-M33 MCU with TrustZone, 160 MHz with 4 Mbytes of Flash memory | Microcontrollers | 17 | Active | The STM32U59xxx devices belong to an ultra-low-power microcontrollers family (STM32U5 Series) based on the high-performance Arm®Cortex®-M33 32-bit RISC core. They operate at a frequency of up to 160 MHz.
The Cortex®-M33 core features a single-precision FPU (floating-point unit), that supports all the Arm®single-precision data-processing instructions and all the data types.
The Cortex®-M33 core also implements a full set of DSP (digital signal processing) instructions and a MPU (memory protection unit) that enhances the application security.
The devices embed high-speed memories (up to 4 Mbytes of flash memory and 2.5 Mbytes of SRAM), a FSMC (flexible external memory controller) for static memories (for devices with packages of 100 pins and more), two Octo-SPI and one Hexadeca-SPI memory interfaces (at least one Quad-SPI available on all packages) and an extensive range of enhanced I/Os and peripherals connected to three APB buses, three AHB buses and a 32-bit multi-AHB bus matrix.
The devices offer security foundation compliant with the TBSA (trusted-based security architecture) requirements from Arm®. It embeds the necessary security features to implement a secure boot, secure data storage and secure firmware update. Besides these capabilities, the devices incorporate a secure firmware installation feature, that allows the customer to secure the provisioning of the code during its production. A flexible life cycle is managed thanks to multiple levels of readout protection and debug unlock with password. Firmware hardware isolation is supported thanks to securable peripherals, memories and I/Os, and privilege configuration of peripherals and memories.
The devices feature several protection mechanisms for embedded flash memory and SRAM: readout protection, write protection, secure and hide protection areas.
The devices embed several peripherals reinforcing security: a HASH hardware accelerator, and a true random number generator.
The devices offer active tamper detection and protection against transient and environmental perturbation attacks, thanks to several internal monitoring generating secret data erase in case of attack. This helps to fit the PCI requirements for point of sales applications.
The devices offer two fast 14-bit ADCs (2.5 Msps), one 12-bit ADC (2.5 Msps), two comparators, two operational amplifiers, two DAC channels, an internal voltage reference buffer, a low-power RTC, four 32-bit general-purpose timers, two 16-bit PWM timers dedicated to motor control, three 16-bit general-purpose timers, two 16-bit basic timers and four 16-bit low-power timers.
The devices offer a rich set of graphic features: Neo-Chrom GPU (GPU2D) for fast texture mapping, scaling and rotation, Chrom-ART (DMA2D) for smooth motion and transparency effects, Chrom-GRC (GFXMMU) for memory optimization, MIPI®DSI Host controller with two DSI lanes running at up to 500 Mbit/s each, and LCD-TFT controller (LTDC).
The devices support a MDF (multi-function digital filter) with six filters dedicated to the connection of external sigma-delta modulators. Another low-power digital filter dedicated to audio signals is embedded (ADF), with one filter supporting sound-activity detection. The devices embed mathematical accelerators (a trigonometric functions accelerator plus a filter mathematical accelerator). In addition, up to 22 capacitive sensing channels are available.
The devices also feature standard and advanced communication interfaces such as: six I2Cs, three SPIs, four USARTs, two UARTs and one low-power UART, two SAIs, one DCMI (digital camera interface), two SDMMCs, one FDCAN, one USB OTG high-speed, one USB Type-C™/USB Power Delivery controller, and one generic synchronous 8-/16-bit PSSI (parallel data input/output slave interface).
The devices operate in the –40 to +85 °C (+ 105 °C junction) and –40 to +125 °C (+130 °C junction) temperature ranges from a 1.71 to 3.6 V power supply.
A comprehensive set of power-saving modes allow the design of low-power applications. Many peripherals (including communication, analog, timers and audio peripherals) can be functional and autonomous down to Stop mode with direct memory access, thanks to LPBAM support (low-power background autonomous mode).
Some independent power supplies are supported like an analog independent supply input for ADC, DACs, OPAMPs and comparators, a 3.3 V dedicated supply input for USB and up to 14 I/Os, that can be supplied independently down to 1.08 V. A VBAT input is available for connecting a backup battery in order to preserve the RTC functionality and to backup 32 32-bit registers and 2-Kbyte SRAM.
The devices offer ten packages from 64 to 216 pins. |
