Renesas Electronics Corporation

The 83905 is a low skew, 1-to-6 LVCMOS / LVTTL Fanout Buffer. The low impedance LVCMOS/LVTTL outputs are designed to drive 50Ω series or parallel terminated transmission lines. The effective fanout can be increased from 6 to 12 by utilizing the ability of the outputs to drive two series terminated lines. The 83905 is characterized at full 3.3V, 2.5V, and 1.8V, mixed 3.3V/2.5V, 3.3V/1.8V and 2.5V/1.8V output operating supply mode. Guaranteed output and part-to-part skew characteristics along with the 1.8V output capabilities makes the 83905 ideal for high performance, single ended applications that also require a limited output voltage.

The 83905I is a low skew, 1-to-6 LVCMOS / LVTTL Fanout Buffer and a member of the family of High Performance Clock Solutions from IDT. The low impedance LVCMOS/LVTTL outputs are designed to drive 50Ω series or parallel terminated transmission lines. The effective fanout can be increased from 6 to 12 by utilizing the ability of the outputs to drive two series terminated lines. The 83905I is characterized at full 3.3V, 2.5V, and 1.8V, mixed 3.3V/2.5V, 3.3V/1.8V and 2.5V/1.8V output operating supply mode. Guaranteed output and part-to-part skew characteristics along with the 1.8V output capabilities makes the 83905I ideal for high performance, single ended applications that also require a limited output voltage.

The 83908I-02 is a low skew, high performance 1-to-8 Crystal Oscillator/Crystal-to-LVCMOS fanout buffer. The 83908I-02 has selectable single-ended clock or two crystal-oscillator inputs. There is an output enable to disable the outputs by placing them into a high-impedance state. Guaranteed output and part-to-part skew characteristics make the 83908I-02 ideal for those applications demanding well defined performance and repeatability.

The 83940DI is a low skew, 1-to-18 LVPECL- to-LVCMOS/LVTTL Fanout Buffer. The 83940DI has two selectable clock inputs. The PCLK, nPCLK pair can accept LVPECL, CML, or SSTL input levels. The LVCMOS_CLK can accept LVCMOS or LVTTL input levels. The low impedance LVCMOS/LVTTL outputs are designed to drive 50Ω series or parallel terminated transmission lines. The 83940DI is characterized at full 3.3V and 2.5V or mixed 3.3V core, 2.5V output operating supply modes. Guaranteed output and part-to-part skew characteristics make the 83940DI ideal for those clock distribution applications demanding well defined performance and repeatability.

The 83947I is a low skew, 1-to-9 LVCMOS Fanout Buffer. The low impedance LVCMOS/LVTTL outputs are designed to drive 50Ω series or parallel terminated transmission lines. The effective fanout can be increased from 9 to 18 byutilizing the ability of the outputs to drive two series terminated lines. Guaranteed output and part-to-part skew characteristics make the 83947I ideal for high performance, single ended applications that also require a limited output voltage.

The 83948I is a low skew, 1-to-12 Differential-to-LVCMOS/LVTTL Fanout Buffer and a member of the family of High Performance Clock Solutions from IDT. The 83948I has two selectable clock inputs. The CLK, nCLK pair can accept most standard differential input levels. The LVCMOS_CLK can accept LVCMOS or LVTTL input levels. The low impedance LVCMOS/LVTTL outputs are designed to drive 50Ω series or parallel terminated transmission lines. The effective fanout can be increased from 12 to 24 by utilizing the ability of the outputs to drive two series terminated lines. The 83948I is characterized at full 3.3V core/3.3V output. Guaranteed output and part-to-part skew characteristics make the 83948I ideal for those clock distribution applications demanding well defined performance and repeatability.

The 83948I-147 is a low skew, 1-to-12 Differential-to-LVCMOS/LVTTL Fanout Buffer. The 83948I-147 has two selectable clock inputs. The CLK, nCLK pair can accept most standard differential input levels. The LVCMOS_CLK can accept LVCMOS or LVTTL input levels. The low impedance LVCMOS/LVTTL outputs are designed to drive 50Ω series or parallel terminated transmission lines. The effective fanout can be increased from 12 to 24 by utilizing the ability of the outputs to drive two series terminated lines. The 83948I-147 is characterized at full 3.3V, full 2.5V or mixed 3.3V core/2.5V output operating supply modes. Guaranteed output and part-to-part skew characteristics make the 83948I-147 ideal for those clock distribution applications demanding well defined performance and repeatability.

The 83PN156I is a programmable LVPECL synthesizer that is "forward" footprint compatible with standard 5mm x 7mm oscillators. The device uses Renesas' fourth generation FemtoClock™ NG technology for an optimum of high clock frequency and low phase noise performance. Forward footprint compatibility means that a board designed to accommodate the crystal oscillator interface and the optional control pins is also fully compatible with a canned oscillator footprint - the canned oscillator will drop onto the 10-VFQFN footprint for second sourcing purposes. This capability provides designers with programability and lead time advantages of silicon/crystal based solutions while maintaining compatibility with industry standard 5mm x 7mm oscillator footprints for ease of supply chain management. Oscillator-level performance is maintained with Renesas' 4th Generation FemtoClock™ NG PLL technology, which delivers sub 0.5ps rms phase jitter. The 83PN156I defaults to 156.25MHz using a 25MHz crystal with 2 programming pins floating but can also be set to 4 different frequency multiplier settings to support a wide variety of applications. The below table shows some of the more common application settings.

The 83PN161i is LVPECL output synthesizer designed for converting forward-error correction (FEC) clock frequencies in 10 GB Ethernet LAN/WAN transport applications. The device is optimized for an input frequency of 156.25MHz and supports four FEC rate conversions: 33/32, 255/237, 255/238 and 235/236. The conversion rate is pin-selectable and one of four rates are supported at a time. In the default configuration, an input clock of 156.25MHz is converted to an output clock of 168.8294492MHz (255/236). The device uses Renesas' fourth Generation of FemtoClock®NG technology to deliver low phase noise clocks combined with a low power consumption. The RMS phase jitter at 168.8294492MHz output frequency is 0.533ps (12kHz-20MHz integration range).