Renesas Electronics Corporation

The 2059-02 is a VCXO (Voltage Controlled Crystal Oscillator) based clock multiplier and jitter attenuator designed for system clock distribution applications. This monolithic IC, combined with an external inexpensive quartz crystal, can be used to replace a more costly hybrid VCXO retiming module. A dual input mux is also provided. By controlling the VCXO frequency within a phase-locked loop (PLL), the output clock is phase and frequency locked to the input clock. Through selection of external loop filter components, the PLL loop bandwidth and damping factor can be tailored to meet system clock requirements. A loop bandwidth down to the Hz range is possible.

The 2304NZ-1 is a high-performance, low skew, low jitter PCI/PCI-X clock driver. It is designed to distribute high-speed signals in PCI/PCI-X applications operating at speeds from 0 to 140 MHz. The 2304NZ-1 is characterized for operation from -40°C to +85°C for automotive and industrial applications.

The 2305 is a low phase noise, high-speed PLL based, low-skew zero delay buffer. Based on IDT's proprietary low jitter Phase Locked Loop (PLL) techniques, the device provides four low skew outputs at speeds up to 133 MHz at 3.3 V. The outputs can be generated from the PLL (for zero delay), or directly from the input (for testing), and can be set to tri-state mode or to stop at a low level. The PLL feedback is on-chip and is obtained from the CLKOUT pad. The 2305 is available in two different versions. The 2305-1 is the base part. The 2305-1H is a high drive version with faster rise and fall times.

The 2305B is a high-speed phase-locked loop (PLL) clock buffer designed to address high-speed clock distribution applications. The zero delay is achieved by aligning the phase between the incoming clock and the output clock, operable within the range of 10MHz to 133MHz. The 2305B is an 8-pin version of the 2309B. This device accepts one reference input and drives out five low-skew clocks. The -1H version of this device operates, up to 133MHz frequency and has a higher drive than the -1 device. All parts have on-chip PLLs which lock to an input clock on the REF pin. The PLL feedback is on-chip and is obtained from the CLKOUT pad. In the absence of an input clock, the 2305B enters power down. In this mode, the device will draw less than 25μA, the outputs are tri-stated, and the PLL is not running, resulting in a significant reduction of power. The 2305B is characterized for both industrial and commercial operation.