ICL7673Automatic Battery Back-Up Switch | Power Management (PMIC) | 1 | Obsolete | The Intersil ICL7673 is a monolithic CMOS battery backup circuit that offers unique performance advantages over conventional means of switching to a backup supply. The ICL7673 is intended as a low-cost solution for the switching of systems between two power supplies; main and battery backup. The main application is keep-alive-battery power switching for use in volatile CMOS RAM memory systems and real time clocks. In many applications this circuit will represent a low insertion voltage loss between the supplies and load. This circuit features low current consumption, wide operating voltage range, and exceptionally low leakage between inputs. Logic outputs are provided that can be used to indicate which supply is connected and can also be used to increase the power switching capability of the circuit by driving external PNP transistors. |
| Power Management (PMIC) | 1 | Obsolete | |
ICM72188-Digit LED Microprocessor-Compatible Multiplexed Display Decoder Driver | PMIC | 3 | Active | The ICM7218 series of universal LED driver systems provide, in a single package, all the circuitry necessary to interface most common microprocessors or digital systems to an LED display. Included on-chip are an 8-byte static display memory, two types of 7-segment decoders, multiplex scan circuitry, and high current digit and segment drivers for either common cathode or common anode displays. The lCM7218A and 1CM7218B feature two control lines (WRITE and MODE) which write either 4 bits of control information (DATA COMING, SHUTDOWN, DECODE and HEXA/CODE B) or 8 bits of display input data. Display data is automatically sequenced into the 8-byte internal memory on successive positive going WRITE pulses. Data may be displayed either directly or decoded in Hexadecimal or Code B formats. The ICM7218C and lCM7218D feature two control lines (WRITE and HEXA/CODE B/SHUTDOWN), 4 separate display data input lines, and 3 digit address lines. Display data is written into the internal memory by setting up a digit address and strobing the WRITE line low. Only Hexadecimal and Code B formats are available for display outputs. |
ICM72288-Digit, Microprocessor-Compatible, LED Display Decoder Driver | PMIC | 8 | Active | The Intersil ICM7228 display driver interfaces microprocessors to an 8-digit, 7-segment, numeric LED display. Included on chip are two types of 7-segment decoder, multiplex scan circuitry, LED display segment drivers, LED display digit drivers and an 8-byte static memory as display RAM. Data can be written to the ICM7228A and ICM7228B's display RAM in sequential 8-digit update or in single-digit update format. Data is written to the ICM7228C display RAM in parallel random access format. The ICM7228A and ICM7228C drive common anode displays. The ICM7228B drives common cathode displays. All versions can display the RAM data as either Hexadecimal or Code B format. The ICM7228A and ICM7228B incorporate a No Decode mode allowing each bit of each digIt's RAM word to drive individual display segments resulting in independent control of all display segments. As a result, bargraph and other irregular display segments and formats can be driven directly by this chip. The Intersil ICM7228 is an alternative to both the Maxim ICM7218 and the Intersil ICM7218 display drivers. Notice that the ICM7228A/B has an additional single digit access mode. This could make the Intersil ICM7218A/B software incompatible with ICM7228A/B operation. |
| Programmable Timers and Oscillators | 3 | Obsolete | |
| Display Drivers | 2 | Active | |
ICM72458-Character, 16-Segment, Microprocessor Compatible, LED Display Decoder Driver | Display Drivers | 1 | Obsolete | The ICM7245 is an 8-character, alphanumeric display driver and controller which provides all the circuitry required to interface a microprocessor or digital system to a 16-segment display with internal pull-up resistors. It is primarily intended for use in microprocessor systems, where it minimizes hardware and software overhead. Incorporated on-chip are a 64-character ASClI decoder, 8x6 memory, high power character and segment drivers, and the multiplex scan circuitry. 6-bit ASCll data to be displayed is written into the memory directly from the microprocessor data bus. Data location depends upon the selection of either Sequential (MODE = 1) or Random access mode (MODE = 0). In the Sequential Access mode the first entry is stored in the lowest location and displayed in the "left-most" character position. Each subsequent entry is automatically stored in the next higher location and displayed to the immediate "right" of the previous entry. A DISPlay FULL signal is provided after 8 entries; this signal can be used for cascading devices together. A CLR pin is provided to clear the memory and reset the location counter. The Random Access mode allows the processor to select the memory address and display digit for each input word. The character multiplex scan runs whenever data is not being entered. It scans the memory and CHARacter drivers, and ensures that the decoding from memory to display is done in the proper sequence. Intercharacter blanking is provided to avoid display ghosting. |
| Integrated Circuits (ICs) | 9 | Active | |
| Clock/Timing | 1 | Obsolete | |
| Clock/Timing | 1 | Obsolete | |
