Analog Devices

The LTC4309 hot swappable 2-wire bus buffer allows I/O card insertion into a live backplane without corruption of the data and clock busses. The LTC4309 provides bidirectional buffering, keeping the backplane and card capacitances isolated. Low offset and high VOLtolerance allows cascading of multiple devices on the clock and data busses. If SDAOUT or SCLOUT are low for 30ms,FAULTwill pull low indicating a stuck bus low condition. If DISCEN is tied high, the LTC4309 will automatically break the bus connection and generate up to 16 clock pulses and a stop bit in an attempt to free the bus. A connection will resume if the stuck bus is cleared. If DISCEN is connected to GND, the busses will remain connected with no clock or stop bit generation.ACCinput enables rise-time accelerators for high capacitively loaded busses.During insertion, the SDA and SCL lines are precharged to 1V to minimize bus disturbances. When driven high, the ENABLE input allows the LTC4309 to connect after a stop bit or bus idle. Driving ENABLE low breaks the connection between SDAIN and SDAOUT, SCLIN and SCLOUT. READY is an open drain output which indicates that the backplane and card sides are connected.ApplicationsLive Board InsertionServersCapacitance Buffer/Bus ExtenderRAID SystemsATCA

The LTC4310 provides bidirectional I2C communications between two I2C buses whose grounds are isolated from one another. Each LTC4310 encodes I2C bus logic states into signals that are transmitted across an isolation barrier to another LTC4310. The receiving LTC4310 decodes the transmission and drives its l2C bus to the appropriate logic state. The isolation barrier can be bridged by an inexpensive Ethernet, or other transformer, to achieve communications across voltage differences reaching thousands of volts, or it can be bridged by capacitors for lower voltage isolation. The LTC4310-1 is intended for use in 100kHz I2C systems. The LTC4310-2 is intended for 400kHz I2C systems.Rise time accelerators provide strong pull-up currents on SCL and SDA rising edges to meet rise time specifications for heavily loaded systems. Data and clock Hot Swap™circuitry prevent data corruption when a card is inserted into or removed from a live bus. When a bus is stuck low for 37ms, the LTC4310 turns off its pull-down devices and generates up to sixteen clocks and a STOP bit in an attempt to free the bus. Driving EN low sets the LTC4310 in a very low current shutdown mode to conserve power.ApplicationsIsolated I2C, SMBus and PMBus InterfacesIsolated Power SuppliesPositive-to-Negative Rail CommunicationsPower-over-Ethernet

The LTC4311 is a dual I2C active pull-up designed to enhance data transmission speed and reliability for bus loading conditions well beyond the 400pF I2C specification limit. The LTC4311 operates at supply voltages from 1.6V to 5.5V and is also compatible with SMBus.The LTC4311 allows multiple device connections or a longer, more capacitive interconnect, without compromising slew rates or bus performance, by using two slew limited pull-up currents.During positive bus transitions, the LTC4311 provides slew limited pull-up currents to quickly slew the I2C or SMBus lines to the bus pull-up voltage. During negative transitions or steady DC levels, the currents are disabled to improve negative slew rate, and improve low state noise margins. An auto detect standby mode reduces supply current if both SCL and SDA are high. When disabled, the LTC4311 goes into low (<5μA) current shutdown.The LTC4311 is available in the 2mm × 2mm × 0.75mm DFN, and SC70 packages.ApplicationsNotebook and Palmtop ComputersPortable InstrumentsBattery ChargersIndustrial ControlsTV/Video ProductsACPI SMBus Interface

The LTC4312 is a hot-swappable 2-channel 2-wire bus multiplexer that allows one upstream bus to connect to any combination of downstream busses or channels. An individual enable pin controls each connection. The LTC4312 provides bidirectional buffering, keeping the upstream bus capacitance isolated from the downstream bus capacitances. The high noise margin allows the LTC4312 to be interoperable with I2C devices that drive a high VOL(> 0.4V). The LTC4312 supports level translation between 1.5V, 1.8V, 2.5V, 3.3V and 5V busses. The hot-swappable nature of the LTC4312 allows I/O card insertion into, and removal from, a live backplane without corruption of the data and clock busses.If both data and clock are not simultaneously high at least once in 45ms and DISCEN is high, aFAULTsignal is generated indicating a stuck bus low condition, the input is disconnected from each enabled output channel and up to 16 clocks are generated on the enabled downstream busses. A three stateACCpin enables input and output side rise time accelerators of varying strengths and sets the VIL,RISINGvoltage.ApplicationsTelecommunications Systems Including ATCAAddress ExpansionLevel TranslatorCapacitance Buffers/Bus ExtenderLive Board InsertionPMBus

The LTC4313 is a hot swappable 2-wire bus buffer that provides bidirectional buffering while maintaining a low offset voltage and high noise margin up to 0.3 • VCC. The high noise margin allows the LTC4313 to be interoperable with devices that drive a high VOL(>0.4V) and allows multiple LTC4313s to be cascaded. The LTC4313-1 and LTC4313-2 support level translation between 3.3V and 5V busses. In addition to these voltages, the LTC4313-3 also supports level translation to 1.5V, 1.8V and 2.5V.During insertion, the SDA and SCL lines are pre-charged to 1V to minimize bus disturbances. Connection is established between the input and output after ENABLE is asserted high and a stop bit or bus idle condition has been detected on the SDA and SCL pins.If both data and clock are not simultaneously high at least once in 45ms, the input is disconnected from the output. Up to 16 clock pulses are subsequently generated to free the stuck bus. Rise time accelerators (RTAs) provide pull-up currents on SDA and SCL rising edges to meet rise time specifications in heavily loaded systems. The RTAs are configured as slew limited switches in the LTC4313-1 and 2.5mA current sources in the LTC4313-2. The LTC4313-3 does not have RTAs.ApplicationsCapacitance Buffers/Bus ExtenderLive Board InsertionTelecommunications Systems Including ATCALevel TranslationPMBusServers

The LTC4314 is a hot-swappable 4-channel 2-wire bus multiplexer that allows one upstream bus to connect to any combination of downstream busses or channels. An individual enable pin controls each connection. The LTC4314 provides bidirectional buffering, keeping the upstream bus capacitance isolated from the downstream bus capacitances. The high noise margin allows the LTC4314 to be interoperable with I2C devices that drive a high VOL(> 0.4V). The LTC4314 supports level translation between 1.5V, 1.8V, 2.5V, 3.3V and 5V busses. The hot-swappable nature of the LTC4314 allows I/O card insertion into, and removal from, a live backplane without corruption of the data and clock busses.If both data and clock are not simultaneously high at least once in 45ms and DISCEN is high, aFAULTsignal is generated indicating a stuck bus low condition, the input is disconnected from all enabled output channels, and up to 16 clocks are generated on the enabled downstream busses. A three stateACCpin enables input and output side rise time accelerators of varying strengths and sets the VIL,RISINGvoltage.ApplicationsTelecommunications Systems Including ATCAAddress ExpansionLevel TranslatorCapacitance Buffers/Bus ExtenderLive Board InsertionPMBus

The LTC4315 is a hot-swappable 2-wire bus buffer that provides bidirectional buffering, while maintaining a low offset voltage and high noise margin up to 0.3 • VCC. The high noise margin allows the LTC4315 to be interoperable with devices that drive a high VOL(>0.4V) and allows multiple LTC4315s to be cascaded. The LTC4315 supports level translation between 1.5V, 1.8V, 2.5V, 3.3V and 5V busses.During insertion, the SDA and SCL lines are precharged to 1V to minimize bus disturbances. Connection is established between the input and output after ENABLE is asserted high and a stop bit or bus idle condition has been detected on the SDA and SCL pins.If both data and clock are not simultaneously high at least once in 45ms and DISCEN is high, aFAULTsignal is generated indicating a stuck bus low condition and the input is disconnected from the output. Up to 16 clock pulses are subsequently generated to free the stuck bus. A three stateACCpin enables input and output side rise time accelerators of various strengths.ApplicationsCapacitance Buffers/Bus ExtenderLive Board InsertionTelecommunications Systems Including ATCALevel TranslationPMBusServers

The LTC4316 enables the hardwired address of one or more I2C or SMBus slave devices to be translated to a different address. This allows slaves with the same hardwired address to coexist on the same bus. Only discrete resistors are needed to select the new address and no software programming is required. Up to 127 different address translations are available.The LTC4316 incorporates a pass-through mode which disables the address translation and allows general call addressing by the master. The LTC4316 is designed to automatically recover from abnormal bus conditions like bus stuck low or premature STOP bits.Part NumberNumber of Input ChannelsNumber of Output ChannelsLTC431611LTC431712LTC431822ApplicationsI2C, SMBus Address ExpansionAddress TranslationServersTelecom

The LTC4317 enables the hardwired address of one or more I2C or SMBus slave device to be translated to a different address. This allows slaves with the same hardwired address to coexist on the same bus. Only discrete resistors are needed to select the new address and no software programming is required. Up to 127 different address translations are available.The LTC4317 incorporates a pass-through mode which disables the address translation and allows general call addressing by the master. The LTC4317 is designed to automatically recover from abnormal bus conditions like bus stuck low or premature STOP bits.The LTC4317 has two output channels for two different sets of slaves. The input channels are tied together to a common set of pins to reduce the pin count and package size.Part NumberNumber of Input ChannelsNumber of Output ChannelsLTC431611LTC431712LTC431822ApplicationsI2C, SMBus Address ExpansionAddress TranslationServersTelecom

The LTC4318 enables the hardwired address of one or more I2C or SMBus slave devices to be translated to a different address. This allows slaves with the same hardwired address to coexist on the same bus. Only discrete resistors are needed to select the new address and no software programming is required. Up to 127 different address translations are available.The LTC4318 incorporates a pass-through mode which disables the address translations and allows general call addressing by the master. The LTC4318 is designed to automatically recover from abnormal bus conditions like bus stuck low or premature STOP bits.Part NumberNumber of Input ChannelsNumber of Output ChannelsLTC431611LTC431712LTC431822ApplicationsI2C, SMBus Address ExpansionAddress TranslationServersTelecom