Analog Devices

The LTC4296-1 is an IEEE 802.3cg-compliant, five port, single-pair power over Ethernet (SPoE), power sourcing equipment (PSE) controller. SPoE simplifies system design and installation with standardized power and Ethernet data over a single-pair cable. The LTC4296-1 is designed for interoperability with 802.3cg powered devices (PDs) in 24 V or 54 V systems. The LTC4296-1 delivers power using external, low drain-to-source on resistance (RDS(ON)), N-channel metal-oxide semiconductor field-effect transistors (MOSFETs), which minimize voltage drop and ensure application ruggedness.High-side circuit breakers with foldback, analog current limit (ACL) provide controlled inrush and short-circuit protection. An optional low-side circuit breaker protects the negative output against backfeed faults, and ground faults in nonisolated applications. PD classification via the serial communication classification protocol (SCCP) and maintain full voltage signature (MFVS) ensure that the full operating voltage is only applied to the cable when a PD is present. The SWx pins disconnect port power snubbers during detection and classification. PD initiated sleep and wake-up are supported. The WAKEUP pin supports wake-up forwarding. Telemetry, status, and software control features are accessed via a serial peripheral interface (SPI) bus interface with packet error code (PEC) protection.The LTC4296-1 provides a versatile SPoE, PSE solution for 10BASE-T1L controllers and switches and can easily be integrated with the Analog Devices, Inc., 10BASE-T1L transceiver portfolio, such as the ADIN1100 (physical layer, PHY), ADIN1110 (MACPHY), and ADIN2111 (2-port switch).APPLICATIONSOperational technology (OT) systemsBuilding and factory automation systemsField instruments and switchesSecurity systemsTraffic control systems

The LTC4300 series hot swappable 2-wire bus buffers allow I/O card insertion into a live backplane without corruption of the data and clock busses. When the connection is made, the LTC4300-1/LTC4300-2 provide bidirectional buffering, keeping the backplane and card capacitances isolated. Rise-time accelerator circuitry* allows the use of weaker DC pull-up currents while still meeting rise-time requirements. During insertion, the SDA and SCL lines are precharged to 1V to minimize bus disturbances.The LTC4300-1 incorporates a CMOS threshold digital ENABLE input pin, which forces the part into a low current mode when driven to ground and sets normal operation when driven to VCC. It also includes an open drain READY output pin, which indicates that the backplane and card sides are connected together. The LTC4300-2 replaces the ENABLE pin with a dedicated supply voltage pin, VCC2, for the card side, providing level shifting between 3.3V and 5V systems. Both the backplane and card may be powered with supply voltages ranging from 2.7V to 5.5V, with no contraints on which supply voltage is higher. The LTC4300-2 also replaces the READY pin with a digital CMOS input pin, ACC, which enables and disables the rise-time accelerator currents.The LTC4300 is available in a small 8-pin MSOP package.*U.S. Patent No. 6,650,174ApplicationsHot Board InsertionServersCapacitance Buffer/Bus ExtenderDesktop Computer

The LTC4301L hot swappable, 2-wire bus buffer allows I/O card insertion into a live backplane without corruption of the data and clock busses. In addition, the LTC4301L SDAIN and SCLIN pins are compatible with systems with pull-up voltages as low as 1V. Control circuitry prevents the backplane from being connected to the card until a stop bit or a bus idle is present. When the connection is made, the LTC4301L provides bidirectional buffering, keeping the backplane and card capacitances isolated.When driven low, the CS input pin allows the part to connect after a stop bit or bus idle occurs. Driving CS high breaks the connection between SCLIN and SCLOUT and between SDAIN and SDAOUT. A logic high on READY indicates that the backplane and card sides are connected together.The LTC4301L is offered in 8-pin DFN (3mm x 3mm) and MSOP packages.ApplicationsHot Board InsertionServersCapacitance Buffer/Bus ExtenderDesktop Computers

The LTC4302-1/LTC4302-2 addressable I2C bus and SMBus compatible bus buffers allow a peripheral board to be inserted and removed from a live backplane without corruption of the bus. The LTC4302-1/LTC4302-2 maintain electrical isolation between the backplane and peripheral board until their VCCsupply is valid and a master device on the backplane side addresses the LTC4302-1/LTC4302-2 and commands them to connect. The LTC4302-1/LTC4302-2’s ADDRESS pin provides 32 possible addresses set by an external resistive divider between VCCand GND. The LTC4302-1/LTC4302-2 work with supply voltages ranging from 2.7V to 5.5V. The SDA and SCL inputs and outputs do not load the bus lines when VCCis low.Rise time accelerator circuitry allows for heavier capacitive bus loading while still meeting system timing requirements. During insertion, the SDA and SCL lines are precharged to 1V to minimize bus disturbances. Two general purpose input/output pins (GPIOs) on the LTC4302-1 can be configured as inputs, open-drain outputs or push-pull outputs. The LTC4302-2 option replaces one GPIO pin with a second supply voltage pin VCC2, providing level shifting between systems with different supply voltages. The LTC4302-1/LTC4302-2 are available in a 10-pin MSOP package.ApplicationsLive Board Insertion5V/3.3V Level TranslatorServersCapacitance Buffer/Bus ExtenderNested Addressing

The LTC4303 hot swappable 2-wire Bus Buffer allows I/O card insertion into a live backplane without corruption of the data and clock busses. When a connection is made, the LTC4303 provides bidirectional buffering, keeping the backplane and card capacitances isolated. If SDAOUT or SCLOUT is low for ≥ 30ms (typ), the LTC4303 automatically breaks the data and clock bus connection. At this time the LTC4303 automatically generates up to 16 clock pulses on SCLOUT in an attempt to free the bus. A connection will be enabled automatically when the bus becomes free.Rise-time accelerator circuitry allows the use of larger pull-up resistors while still meeting rise-time requirements. During insertion, the SDA and SCL lines are precharged to 1V to minimize bus disturbances. When driven high, ENABLE allows the LTC4303 to connect after a stop bit or bus idle occurs. Driving ENABLE low breaks the connection between SDAIN and SDAOUT, SCLIN and SCLOUT. READY is an open drain output that indicates when the backplane and card sides are connected together.ApplicationsHot Board InsertionServersCapacitance Buffer/Bus ExtenderRAID Systems

The LTC4304 hot swappable 2-wire bus buffer allows I/O card insertion into a live backplane without corruption of the data and clock busses. When a connection is made, the LTC4304 provides bidirectional buffering, keeping the backplane and card capacitances isolated. If SDAOUT or SCLOUT is low for ≥30ms (typ), the LTC4304 automatically breaks the data and clock bus connection andFAULTwill pull low. At this time the LTC4304 automatically generates up to 16 clock pulses on SCLOUT in an attempt to free the bus. A connection will be enabled automatically when the bus becomes free. A logic low on theACCinput enables the LTC4304's rise-time accelerators. A logic high onACCdisables the rise-time accelerators, which allows SDA and SCL bus pull-up voltages below VCC.During insertion, the SDA and SCL lines are precharged to 1V to minimize bus disturbances. When driven high, ENABLE allows the LTC4304 to connect after a stop bit or bus idle occurs. Driving ENABLE low breaks the connection between SDAIN and SDAOUT, SCLIN and SCLOUT. READY is an open drain output that indicates when the backplane and card sides are connected together.ApplicationsHot Board InsertionServersCapacitance Buffer/Bus ExtenderRAID Systems

The LTC4305 is a 2-channel, 2-wire bus multiplexer with bus buffers to provide capacitive isolation between the upstream bus and downstream buses. Through software control, the LTC4305 connects the upstream 2-wire bus to any desired combination of downstream channels. Each channel can be pulled up to a supply voltage ranging from 2.2V to 5.5V, independent of the LTC4305 supply voltage. The downstream channels are also provided with anALERT1-ALERT2inputs for fault reporting.Programmable timeout circuitry disconnects the downstream buses if the bus is stuck low. When activated, rise time accelerators source currents into the 2-wire bus pins to reduce rise time. Driving the ENABLE pin low restores all features to their default states. Three address pins provide 27 distinct addresses.The LTC4305 is available in 16-lead (4mm × 5mm) DFN and SSOP packages.ApplicationsNested Addressing5V/3.3V Level TranslatorCapacitance Buffer/Bus Extender

The LTC4306 is a 4-channel, 2-wire bus multiplexer with bus buffers to provide capacitive isolation between the upstream bus and downstream buses. Through software control, the LTC4306 connects the upstream 2-wire bus to any desired combination of downstream buses. Each channel can be pulled up to a supply voltage ranging from 2.2V to 5.5V, independent of the LTC4306 supply voltage.The downstream channels are also provided withALERT1-ALERT4inputs for fault reporting.Programmable timeout circuitry disconnects the downstream buses if the bus is stuck low. When activated, rise time accelerators source currents into the 2-wire bus pins to reduce rise time. Driving the ENABLE pin low restores all features to their default states. Three address pins provide 27 distinct addresses.The LTC4306 is available in 24-lead QFN (4mm × 5mm) and SSOP packages.ApplicationsNested Addressing5V/3.3V Level TranslatorCapacitance Buffer/Bus Extender

The LTC4307 hot swappable, 2-wire bus buffer allows I/O card insertion into a live backplane without corruption of the data and clock busses. The LTC4307 provides bidirectional buffering, keeping the backplane and card capacitances isolated. Low offset and high VOLtolerance allows multiple devices to be cascaded on the clock and data busses. If SDAOUT or SCLOUT are low for 30ms, the LTC4307 will automatically break the bus connection. At this time the LTC4307 automatically generates up to 16 clock pulses on SCLOUT in an attempt to free the bus. A connection will resume if the stuck bus is cleared.During insertion, the SDA and SCL lines are pre-charged to 1V to minimize bus disturbances. When driven high, the ENABLE input allows the LTC4307 to connect after a stop bit or bus idle. Driving ENABLE low breaks the connection between SDAIN and SDAOUT, SCLIN and SCLOUT. READY is an open-drain output which indicates that the backplane and card sides are connected.ApplicationsLive Board InsertionServersCapacitance Buffer/Bus ExtenderRAID SystemsATCA

The LTC4308 hot swappable, 2-wire bus buffer allows I/O card insertion into a live backplane without corruption of the data and clock busses. The LTC4308 provides bidirectional buffering, keeping the backplane and card capacitances isolated. Negative offset from output to input allows communication between output bus devices with high VOLand devices on the low voltage input side, where bus supplies can be as low as 0.9V. If SDAOUT or SCLOUT are low for 30ms, the LTC4308 will automatically break the Input-Output connection. At this time the LTC4308 automatically generates up to 16 clock pulses on SCLOUT in an attempt to free the bus. A connection will resume if the stuck bus is cleared.During insertion, the SDAOUT and SCLOUT lines are pre-charged to 1V to minimize bus disturbances. When driven high, the ENABLE input allows the LTC4308 to connect after a stop bit or bus idle condition. Driving ENABLE low breaks the connection between SDAIN and SDAOUT, SCLIN and SCLOUT. READY is an open-drain output which indicates that the backplane and card sides are connected.ApplicationsLive Board InsertionServersCapacitance Buffer/Bus ExtenderRAID SystemsATCA