Analog Devices

TheAD5674/AD5674R/AD5679/AD5679R are low power, 16-channel, 12-/16-bit, buffered voltage output, digital-to-analog converters (DACs) that include a 2.5 V, 2 ppm/°C internal reference (enabled by default), and a gain select pin, resulting in a full-scale output of 2.5 V (gain = 1) or 5 V (gain = 2). The devices operate from a single, 2.7 V to 5.5 V supply range and are guaranteed monotonic by design. The AD5674/AD5674R/AD5679/AD5679R are available in a 28-lead lead frame chip scale package (LFCSP) and incorporate a power-on reset (POR) circuit that ensures that the DAC outputs power up to and remains at zero-scale or midscale until a valid write. The AD5674/AD5674R/AD5679/AD5679R contain a power-down mode that reduces the current consumption to 2 μA typical.Product HighlightsHigh channel density: 16 channels in 4 mm × 4 mm LFCSP.High relative accuracy (integral nonlinearity (INL)) ±4 LSB maximum.Low drift, 2.5 V, on-chip reference.ApplicationsOptical transceiversBase station power amplifiersProcess control (programmable logic controller (PLC) input/output cards)Industrial automationData acquisition systems

The AD5680, a member of thenanoDAC family, is a single, 18-bit buffered voltage-out digital-to-analog converter (DAC) that operates from a single 4.5 V to 5.5 V supply and is 18-bit monotonic.The AD5680 requires an external reference voltage to set the output range of the DAC. The part incorporates a power-on reset circuit that ensures the DAC output powers up to 0 V (AD5680-1) or to midscale (AD5680-2) and remains there until a valid write takes place.The low power consumption of this part in normal operation makes it ideally suited to portable battery-operated equipment. The power consumption is 1.6 mW at 5 V.The AD5680 on-chip precision output amplifier allows rail-to-rail output swing to be achieved. For remote sensing applications, the output amplifier’s inverting input is available to the user.The AD5680 uses a versatile 3-wire serial interface that operates at clock rates up to 30 MHz, and is compatible with standard SPI®, QSPI™, MICROWIRE™, and DSP interface standards.ApplicationsClosed-loop process controlLow bandwidth data acquisition systemsPortable battery-powered instrumentsGain and offset adjustmentPrecision setpoint control

TheAD5683R/AD5682R/AD5681R/AD5683, members of thenanoDAC+®family, are low power, single-channel, 16-/14-/12-bit buffered voltage out digital-to-analog converters (DACs). The devices, except the AD5683, include an enabled by default internal 2.5 V reference, offering 2 ppm/°C drift. The output span can be programmed to be 0 V to VREFor 0 V to 2 × VREF. All devices operate from a single 2.7 V to 5.5 V supply and are guaranteed monotonic by design. The devices are available in a 2.00 mm × 2.00 mm, 8-lead LFCSP or a 10-lead MSOP.The internal power-on reset circuit ensures that the DAC register is written to zero scale at power-up while the internal output buffer is configured in normal mode. The AD5683R/AD5682R/AD5681R/AD5683 contain a power-down mode that reduces the current consumption of the device to 2 µA (maximum) at 5 V and provides software selectable output loads while in power-down mode.The AD5683R/AD5682R/AD5681R/AD5683 use a versatile 3-wire serial interface that operates at clock rates of up to 50 MHz. Some devices also include asynchronousRESETpin and VLOGICpin options, allowing 1.8 V compatibilityProduct HighlightsHigh Relative Accuracy (INL).AD5683R/AD5683 (16-bit): ±2 LSB maximum.Low Drift, 2.5 V On-Chip Reference.2 ppm/°C typical temperature coefficient.5 ppm/°C maximum temperature coefficient.Two Package Options.2.00 mm × 2.00 mm, 8-lead LFCSP.10-lead MSOP.ApplicationsProcess controlsData acquisition systemsDigital gain and offset adjustmentProgrammable voltage sources

TheAD5683R/AD5682R/AD5681R/AD5683, members of thenanoDAC+®family, are low power, single-channel, 16-/14-/12-bit buffered voltage out digital-to-analog converters (DACs). The devices, except the AD5683, include an enabled by default internal 2.5 V reference, offering 2 ppm/°C drift. The output span can be programmed to be 0 V to VREFor 0 V to 2 × VREF. All devices operate from a single 2.7 V to 5.5 V supply and are guaranteed monotonic by design. The devices are available in a 2.00 mm × 2.00 mm, 8-lead LFCSP or a 10-lead MSOP.The internal power-on reset circuit ensures that the DAC register is written to zero scale at power-up while the internal output buffer is configured in normal mode. The AD5683R/AD5682R/AD5681R/AD5683 contain a power-down mode that reduces the current consumption of the device to 2 µA (maximum) at 5 V and provides software selectable output loads while in power-down mode.The AD5683R/AD5682R/AD5681R/AD5683 use a versatile 3-wire serial interface that operates at clock rates of up to 50 MHz. Some devices also include asynchronousRESETpin and VLOGICpin options, allowing 1.8 V compatibilityProduct HighlightsHigh Relative Accuracy (INL).AD5683R/AD5683 (16-bit): ±2 LSB maximum.Low Drift, 2.5 V On-Chip Reference.2 ppm/°C typical temperature coefficient.5 ppm/°C maximum temperature coefficient.Two Package Options.2.00 mm × 2.00 mm, 8-lead LFCSP.10-lead MSOP.ApplicationsProcess controlsData acquisition systemsDigital gain and offset adjustmentProgrammable voltage sources

The AD5683R/AD5682R/AD5681R/AD5683, members of thenanoDAC+®family, are low power, single-channel, 16-/14-/12-bit buffered voltage out digital-to-analog converters (DACs). The devices, except the AD5683, include an enabled by default internal 2.5 V reference, offering 2 ppm/°C drift. The output span can be programmed to be 0 V to VREFor 0 V to 2 × VREF. All devices operate from a single 2.7 V to 5.5 V supply and are guaranteed monotonic by design. The devices are available in a 2.00 mm × 2.00 mm, 8-lead LFCSP or a 10-lead MSOP.The internal power-on reset circuit ensures that the DAC register is written to zero scale at power-up while the internal output buffer is configured in normal mode. The AD5683R/AD5682R/AD5681R/AD5683 contain a power-down mode that reduces the current consumption of the device to 2 µA (maximum) at 5 V and provides software selectable output loads while in power-down mode.The AD5683R/AD5682R/AD5681R/AD5683 use a versatile 3-wire serial interface that operates at clock rates of up to 50 MHz. Some devices also include asynchronousRESETpin and VLOGICpin options, allowing 1.8 V compatibilityProduct HighlightsHigh Relative Accuracy (INL).AD5683R/AD5683 (16-bit): ±2 LSB maximum.Low Drift, 2.5 V On-Chip Reference.2 ppm/°C typical temperature coefficient.5 ppm/°C maximum temperature coefficient.Two Package Options.2.00 mm × 2.00 mm, 8-lead LFCSP.10-lead MSOP.ApplicationsProcess controlsData acquisition systemsDigital gain and offset adjustmentProgrammable voltage sources

The AD5686/AD5684, a member of thenanoDAC+™ family, is a low power, quad, 16-/12-bit buffered voltage output DAC. The device includes a gain select pin giving a full-scale output of 2.5 V (gain = 1) or 5 V (gain = 2). All devices operate from a single 2.7 V to 5.5 V supply, is guaranteed monotonic by design, and exhibits less than 0.1% FSR gain error and 1.5 mV offset error performance. The devices are available in a 3 mm × 3 mm LFCSP and a TSSOP package.The AD5686/AD5684 also incorporate a power-on reset circuit and a RSTSEL pin that ensures that the DAC outputs power up to zero scale or midscale and remain at that level until a valid write takes place. Each part contains a per-channel power-down feature that reduces the current consumption of the device to 4 μA at 3 V while in power-down mode.The AD5686/AD5684 employ a versatile SPI interface that operates at clock rates up to 50 MHz, and all devices contain a VLOGICpin intended for 1.8 V/3 V/5 V logic.Product HighlightsHigh Relative Accuracy (INL): ±2 LSB maximumExcellent DC Performance.Total unadjusted error: ±0.1% of FSR maximumOffset error: ±1.5 mV maximumGain error: ±0.1% of FSR maximumTwo Package Options: 3 mm × 3 mm, 16-lead LFCSP and 16-lead TSSOPApplicationsDigital gain and offset adjustmentProgrammable attenuatorsProcess control (PLC I/O cards)Industrial automationData acquisition systems

The AD5685RnanoDAC+™ is a quad, 14-bit, rail-to-rail, voltage output DAC. The device includes a 2.5V, 2ppm/˚C internal reference (enabled by default) and a gain select pin giving a full-scale output of 2.5V (gain=1) or 5V (gain=2).The device operates from a single 2.7 V to 5.5 V supply, is guaranteed monotonic by design and exhibits less than 0.1% FSR gain error and 1.5mV offset error performance. The device is available in a 3mm X 3mm LFCSP and a TSSOP package.The AD5685R also incorporates a power-on-reset circuit and a RSTSEL pin that ensures the DAC outputs power up to zero-scale or midscale, and remain there until a valid write takes place. Each device contains a per-channel power-down feature that reduces the current consumption of the device to 4 uA at 3 V while in power-down mode.The AD5685R employs a versatile SPI interface that operates at clock rates up to 50 MHz and includes a VLOGICpin intended for 1.8V/3V/5V logic.PRODUCT HIGHLIGHTSHigh Relative Accuracy: AD5685R (14-bit): ±1LSB INL maxLow drift on-chip reference: 2.5V, 2ppm/°C temperature driftTwo package options: 3mm × 3mm 16-lead LFCSP or 16-lead TSSOPAPPLICATIONSOptical transceiversBase-station power amplifiersProcess control (PLC I/O cards)Industrial automationData acquisition systems

The AD5686RnanoDAC+™is a quad, 16-bit, rail-to-rail, voltage output DAC. The device includes a 2.5V, 2ppm/˚C internal reference (enabled by default) and a gain select pin giving a full-scale output of 2.5V (gain=1) or 5V (gain=2).The device operates from a single 2.7 V to 5.5 V supply, is guaranteed monotonic by design and exhibits less than 0.1% FSR gain error and 1.5mV offset error performance. The device is available in a 3mm × 3mm LFCSP and a TSSOP package.The AD5686R also incorporates a power-on-reset circuit and a RSTSEL pin that ensures the DAC outputs power up to zero-scale or midscale, and remain there until a valid write takes place. Each device contains a per-channel power-down feature that reduces the current consumption of the device to 4 uA at 3 V while in power-down mode.The AD5686R employs a versatile SPI interface that operates at clock rates up to 50 MHz and includes a VLOGICpin intended for 1.8V/3V/5V logic.PRODUCT HIGHLIGHTSHigh Relative Accuracy: AD5686R (16-bit): ±2LSB INL maxLow drift on-chip reference: 2.5 V, 2 ppm/°C temperature drift.Two package options: 3mm × 3mm 16 lead LFCSP or 16 lead TSSOPAPPLICATIONSOptical transceiversBase-station power amplifiersProcess control (PLC I/O cards)Industrial automationData acquisition systems

TheAD5689R/AD5687R members of thenanoDAC+™ family are low power, dual, 16-/12-bit buffered voltage output digital-to-analog converters (DACs). The devices include a 2.5 V, 2 ppm/°C internal reference (enabled by default) and a gain select pin giving a full-scale output of 2.5 V (gain = 1) or 5 V (gain = 2). The devices operate from a single 2.7 V to 5.5 V supply, are guaranteed monotonic by design, and exhibit less than 0.1% FSR gain error and 1.5 mV offset error performance. Both devices are available in a 3 mm × 3 mm LFCSP and a TSSOP package.The AD5689R/AD5687R also incorporate a power-on reset circuit and a RSTSEL pin that ensure that the DAC outputs power up to zero scale or midscale and remain there until a valid write takes place. Each part contains a per channel power-down feature that reduces the current consumption of the device to 4 μA at 3 V while in power-down mode.The AD5689R/AD5687R use a versatile serial peripheral interface (SPI) that operates at clock rates up to 50 MHz. Both devices contain a VLOGICpin that is intended for 1.8 V/3 V/5 V logic.Product HighlightsHigh Relative Accuracy (INL).AD5689R (16-bit): ±2 LSB maximumAD5687R (12-bit): ±1 LSB maximumLow Drift 2.5 V On-Chip Reference.2 ppm/°C typical temperature coefficient5 ppm/°C maximum temperature coefficientTwo Package Options.3 mm × 3 mm, 16-lead LFCSP16-lead TSSOPApplicationsOptical transceiversBase station power amplifiersProcess control (PLC I/O cards)Industrial automationData acquisition systems