Analog Devices

The ADBT1001 is a flexible, feature rich digital controller that targets high volume battery testing and formation manufacturing and precision battery test instrumentation applications. The ADBT1001 is optimized for minimal component count, maximum flexibility, and minimum design time. Features include differential remote voltage sense, current sense, pulse-width modulation (PWM) generation, frequency synchronization, overvoltage protection (OVP), and current sharing. Programmable protection features include overcurrent protection (OCP), OVP limiting, and external overtemperature protection (OTP).Parameters can be programmed over the serial peripheral interface (SPI), providing extensive programming of the integrated loop filter, PWM signal timing, and soft start timing. The SPI provides access to the many monitoring and system test functions. Reliability is improved through a built-in checksum and programmable protection circuits.A comprehensive graphical user interface (GUI) is provided for simple system and channel configuration and programming of the safety features. The ADBT1001 is available in a 100-lead LQFP_EP.APPLICATIONSBattery formation and testingHigh efficiency battery test systems with recycle capabilityBattery conditioning (charging and discharging) systems

The ADBT1002 is a flexible, feature rich digital controller that targets high volume battery testing and formation manufacturing and precision battery test instrumentation applications. The ADBT1002 is optimized for minimal component count, maximum flexibility, and minimum design time. Features include differential remote voltage sense, current sense, pulse-width modulation (PWM) generation, frequency synchronization, overvoltage protection (OVP), and current sharing. Programmable protection features include overcurrent protection (OCP), OVP limiting, and external overtemperature protection (OTP).Parameters can be programmed over the serial peripheral interface (SPI), providing extensive programming of the integrated loop filter, PWM signal timing, and soft start timing. The SPI provides access to the many monitoring and system test functions. Reliability is improved through a built-in checksum and programmable protection circuits.A comprehensive graphical user interface (GUI) is provided for simple system and channel configuration and programming of the safety features. The ADBT1002 is available in a 100-lead LQFP_EP.APPLICATIONSBattery formation and testingHigh efficiency battery test systems with recycle capabilityBattery conditioning (charging and discharging) systems

The ADCLK854 is a 1.2 GHz/250 MHz LVDS/CMOS fanout buffer optimized for low jitter and low power operation. Possible configurations range from 12 LVDS to 24 CMOS outputs, including combinations of LVDS and CMOS outputs. Three control lines are used to determine whether fixed blocks of outputs (three banks of four) are LVDS or CMOS outputs.The ADCLK854 offers two selectable inputs and a sleep mode feature. The IN_SEL pin state determines which input is fanned out to all the outputs. The SLEEP pin enables a sleep mode to power down the device.The inputs accept various types of single-ended and differential logic levels including LVPECL, LVDS, HSTL, CML, and CMOS. Table 8 provides interface options for each type of connection.This device is available in a 48-pin LFCSP package. It is specified for operation over the standard industrial temperature range of −40°C to +85°C.APPLICATIONSLow jitter clock distributionClock and data signal restorationLevel translationWireless communicationsWired communicationsMedical and industrial imagingATE and high performance instrumentation

TheADCLK905(one input, one output), ADCLK907 (dual one input, one output), andADCLK925(one input, two outputs) are ultrafast clock/data buffers fabricated on the Analog Devices, Inc., proprietary XFCB3 silicon germanium (SiGe) bipolar process.The ADCLK905/ADCLK907/ADCLK925 feature full-swing emitter coupled logic (ECL) output drivers. For PECL (positive ECL) operation, bias VCCto the positive supply and VEEto ground. For NECL (negative ECL) operation, bias VCCto ground and VEEto the negative supply.The buffers offer 95 ps propagation delay, 7.5 GHz toggle rate, 10 Gbps data rate, and 60 fs random jitter (RJ).The inputs have center tapped, 100 Ω, on-chip termination resistors. A VREFpin is available for biasing ac-coupled inputs.The ECL output stages are designed to directly drive 800 mV each side into 50 Ω terminated to VCC− 2 V for a total differential output swing of 1.6 V.The ADCLK905/ADCLK907/ADCLK925 are available in 16-lead LFCSP packages.ApplicationsClock and data signal restoration and level shiftingAutomated test equipment (ATE)High speed instrumentationHigh speed line receiversThreshold detectionConverter clocking

The ADCLK914 is an ultrafast clock/data buffer fabricated on the Analog Devices, Inc., proprietary, complementary bipolar (XFCB-3) silicon-germanium (SiGe) process. The ADCLK914 features high voltage differential signaling (HVDS) outputs suitable for driving the latest Analog Devices high speed digitalto-analog converters (DACs). The ADCLK914 has a single, differential open-collector output.The ADCLK914 buffer operates up to 7.5 GHz with a 160 ps propagation delay and adds only 110 fs random jitter (RJ). The input has a center tapped, 100 Ω, on-chip termination resistor and accepts LVPECL, CML, CMOS, LVTTL, or LVDS (ac-coupled only). A VREFpin is available for biasing ac-coupled inputs.The HVDS output stage is designed to directly drive 1.9 V each side into 50 Ω terminated to VCCfor a total differential output swing of 3.8 V.The ADCLK914 is available in a 16-lead LFCSP. It is specified for operation over the extended industrial temperature range of −40°C to +125°C.ApplicationsClock and data signal restorationHigh speed converter clockingBroadband communicationsCellular infrastructureHigh speed line receiversATE and high performance instrumentationLevel shiftingThreshold detection

The ADCLK944 is an ultrafast clock fanout buffer fabricated on the Analog Devices, Inc., proprietary XFCB3 silicon germanium (SiGe) bipolar process. This device is designed for high speed applications requiring low jitter.The device has a differential input equipped with center-tapped, differential, 100 Ω on-chip termination resistors. The input can accept dc-coupled LVPECL, CML, 3.3 V CMOS (single-ended), and ac-coupled 1.8 V CMOS, LVDS, and LVPECL inputs. A VREFpin is available for biasing ac-coupled inputs.The ADCLK944 features four full-swing emitter-coupled logic (ECL) output drivers. For LVPECL (positive ECL) operation, bias VCCto the positive supply and VEEto ground. For ECL operation, bias VCCto ground and VEEto the negative supply.The ECL output stages are designed to directly drive 800 mV each side into 50 Ω terminated to VCC− 2 V for a total differential output swing of 1.6 V.The ADCLK944 is available in a 16-lead LFCSP and is specified for operation over the standard industrial temperature range of −40°C to +85°C.APPLICATIONSLow jitter clock distributionClock and data signal restorationLevel translationWireless communicationsWired communicationsMedical and industrial imagingATE and high performance instrumentation

The ADCLK948 is an ultrafast clock fanout buffer fabricated on the Analog Devices, Inc., proprietary XFCB3 silicon germanium (SiGe) bipolar process. This device is designed for high speed applications requiring low jitter.The device has two selectable differential inputs via the IN_SEL control pin. Both inputs are equipped with center tapped, differential, 100 Ω on-chip termination resistors. The inputs accept dc-coupled LVPECL, CML, 3.3 V CMOS (single-ended), and ac-coupled 1.8 V CMOS, LVDS, and LVPECL inputs. A VREFx pin is available for biasing ac-coupled inputs.The ADCLK948 features eight full-swing emitter coupled logic (ECL) output drivers. For LVPECL (positive ECL) operation, bias VCCto the positive supply and VEEto ground. For ECL operation, bias VCCto ground and VEEto the negative supply.The output stages are designed to directly drive 800 mV each side into 50 Ω terminated to VCC-2V for a total differential output swing of 1.6V.The ADCLK948 is available in a 32-lead LFCSP and specified for operation over the standard industrial temperature range of −40°C to +85°C.APPLICATIONSLow jitter clock distributionClock and data signal restorationLevel translationWireless communicationsWired communicationsMedical and industrial imagingATE and high performance instrumentation