| Integrated Circuits (ICs) | 1 | Obsolete | |
ADAU1787Four ADC, Two DAC, Low Power Codec with Audio DSPs | CODECS | 2 | Active | The ADAU1787 is a codec with four inputs and two outputs that incorporates two digital signal processors (DSPs). The path from the analog input to the DSP core to the analog output is optimized for low latency and is ideal for noise cancelling headsets. With the addition of just a few passive components, the ADAU1787 provides a complete headset solution.Note that throughout the data sheet, multifunction pins, such as BCLK_0/MP1, are referred to either by the entire pin name or by a single function of the pin, for example, BCLK_0, when only that function is relevant.ApplicationsNoise cancelling handsets, headsets, and headphonesBluetooth ANC handsets, headsets, and headphonesPersonal navigation devicesDigital still and video camerasMusical instrument effect processorsMultimedia speaker systemsSmartphones |
ADAU1788Two ADCs, One DAC, Low Power Codec with Audio DSPs | Integrated Circuits (ICs) | 1 | Active | The ADAU1788 is a codec with two inputs and one output that incorporates two digital signal processors (DSPs). The path from the analog input to the DSP core to the analog output is optimized for low latency and is ideal for noise cancelling headsets. With the addition of just a few passive components, the ADAU1788 provides a noise cancelling headphone solution.Note that throughout this data sheet, multifunction pins, such as BCLK_0/MP1, are referred to either by the entire pin name or by a single function of the pin, for example, BCLK_0, when only that function is relevant.ApplicationsNoise cancelling handsets, headsets, and headphonesBluetooth ANC handsets, headsets, and headphonesPersonal navigation devicesDigital still and video camerasMusical instrument effect processorsMultimedia speaker systemsSmartphones |
ADAU1797High-Performance Audio Codec with Integrated HiFi 3z and FastDSP Cores | CODECS | 1 | Active | The device is a low power, high-performance audio codec that provides three analog input channels, ten DMIC input channels, two PDM output channels, and one high-efficiency Class-D amplifier output channel.The device features a low power HiFi 3z audio DSP core and a low-latency FastDSP core. The audio DSP cores paired with high-fidelity audio data converters are ideal for applications like noise cancellation, transparency, personal sound amplification, and voice processing.When operating in low-power mode, the DSP cores are optimized for small form factor applications such as true wireless stereo (TWS) headphones. In this mode, the device delivers the right level of processing power while still minimizing power consumption to extend play time.The device has the flexibility to also support applications requiring additional processing capability such as over-ear headphones, VR and AR headsets, wearables, hearing assist, and PSAP devices. In high-performance mode, the HiFi 3z core is boosted from 50Mhz to 200MHz, and the FastDSP supports double the number of instructions (up from 64 to 128). This increased processing capability can either be used to offload cycles from the host processor or enable a lower-cost host processor without requiring an additional external audio DSP or MCU.The device supports a -40°C to +85°C temperature range and is available in a space-saving 77-ball WLCSP package (0.4mm pitch, 3.24mm × 4.83mm).APPLICATIONSTrue wireless stereo (TWS) ANC headphonesOver-ear stereo ANC headphonesVR and AR headsets and wearable devicesHearing assist and PSAP devicesSoundbar and smart speaker systemsGaming devices and tablets |
| Integrated Circuits (ICs) | 2 | Active | The ADAU1860/ADAU1860-1 are codecs with three inputs and one output that incorporate two digital signal processors (DSPs). The path from the analog input to the DSP core to the analog output is optimized for low latency and is ideal for noise canceling earphones. With the addition of just a few passive components, the ADAU1860/ADAU1860-1 provide a complete earphone solution.APPLICATIONSNoise canceling handsets, headsets, and headphonesBluetooth active noise canceling (ANC) handsets, headsets, and headphonesPersonal navigation devicesDigital still and video camerasMusical instrument effect processorsMultimedia speaker systemsSmartphones |
ADAU1961Automotive Stereo, Low Power, 96 kHz, 24-Bit Audio Codec with Integrated PLL | Integrated Circuits (ICs) | 2 | Active | The ADAU1961 is a low power, stereo audio codec that supports stereo 48 kHz record and playback at 35 mW from a 3.3 V analog supply. The stereo audio ADCs and DACs support sample rates from 8 kHz to 96 kHz as well as a digital volume control.The record path includes an integrated microphone bias circuit and six inputs. The inputs can be mixed and muxed before the ADC, or they can be configured to bypass the ADC. The ADAU1961 includes a stereo digital microphone input.The ADAU1961 includes five high power output drivers (two differential and three single-ended), supporting stereo head-phones, an earpiece, or other output transducer. AC-coupled or capless configurations are supported. Individual fine level controls are supported on all analog outputs. The output mixer stage allows for flexible routing of audio.The serial control bus supports the I2C and SPI protocols. The serial audio bus is programmable for I2S, left-/right-justified, and TDM modes. A programmable PLL supports flexible clock generation for all standard integer rates and fractional master clocks from 8 MHz to 27 MHzApplicationsAutomotive head unitsAutomotive amplifiersNavigation systemsRear-seat entertainment systems |
ADAU1962A12-Channel High Performance 192kHz, 24-Bit DAC | Data Acquisition | 1 | Active | The ADAU1962A is a high performance, single-chip digital-to-analog converter (DAC) that provides 12 DACs with differential or single-ended outputs using the Analog Devices, Inc., patented multibit Σ-Δ architecture. A serial peripheral interface (SPI)/I2C port is included, allowing a microcontroller to adjust volume and many other parameters. The ADAU1962A operates from 2.5 V digital and 3.3 V analog supplies. A linear regulator is included to generate the digital supply voltage from the analog supply voltage. The ADAU1962A is available in an 80-lead LQFP.The ADAU1962A is designed for low EMI. This consideration is apparent in both the system and circuit design architectures. By using the on-board PLL to derive the internal master clock from an external left-right frame clock (LRCLK), the ADAU1962A can eliminate the need for a separate high frequency master clock and can be used with or without a bit clock. The DACs are designed using the latest Analog Devices continuous time architectures to further minimize EMI. By using 2.5 V digital supplies, power consumption is minimized, and the digital waveforms are a smaller amplitude, further reducing emissions.Note that throughout this data sheet, multifunction pins, such as SCLK/SCL, are referred to by the entire pin name or by a single function of the pin, for example, SCLK, when only that function is relevant.APPLICATIONSAutomotive audio systemsHome theater systemsDigital audio effects processors |
ADAU1966A16-Channel 118 dB SNR Differential Output, 192 kHz, 24-Bit DAC | Evaluation Boards | 2 | Active | The ADAU1966A is a high performance, single-chip digital-to-analog converter (DAC) that provides 16 DACs with differential or single-ended outputs using the Analog Devices, Inc., patented multibit sigma-delta (Σ-Δ) architecture. A serial peripheral interface (SPI)/I2C port is included, allowing a microcontroller to adjust volume and many other parameters. The ADAU1966A operates from 2.5 V digital and 3.3 V analog supplies. A linear regulator is included to generate the digital supply voltage from the analog supply voltage. The ADAU1966A is available in an 80-lead LQFP.The ADAU1966A is designed for low EMI. This consideration is apparent in both the system and circuit design architectures. By using the on-board PLL to derive the internal master clock from an external left-right frame clock (LRCLK), the ADAU1966A can eliminate the need for a separate high frequency master clock and can be used with or without a bit clock. The DACs are designed using the latest Analog Devices continuous time architectures to further minimize EMI. By using 2.5 V digital supplies, power consumption is minimized, and the digital waveforms are a smaller amplitude, further reducing emissions.Note that throughout this data sheet, multifunction pins, such as SCLK/SCL, are referred to by the entire pin name or by a single function of the pin, for example, SCLK, when only that function is relevant.APPLICATIONSAutomotive audio systemsHome theater systemsDigital audio effects processors |
ADAU1977Quad ADC with Diagnostics (10V Input) | Evaluation and Demonstration Boards and Kits | 2 | Active | The ADAU1977 incorporates four high performance analog-to-digital converters (ADCs) with direct-coupled inputs capable of 10 V rms. The ADC uses multibit sigma-delta (Σ-Δ) architecture with continuous time front end for low EMI. The ADCs can be connected to the electret microphone (ECM) directly and provide the bias for powering the microphone. Built-in diagnostic circuitry detects faults on input lines and includes comprehensive diagnostics for faults on microphone inputs. The faults reported are short to battery, short to microphone bias, short to ground, short between positive and negative input pins, and open input terminals. In addition, each diagnostic fault is available as an IRQ flag for ease in system design. An I2C/SPI control port is also included. The ADAU1977 uses only a single 3.3 V supply. The part internally generates the microphone bias voltage. The microphone bias is programmable in a few steps from 5 V to 9 V. The low power architecture reduces the power consumption. An on-chip PLL can derive the master clock from an external clock input or frame clock (sample rate clock). When fed with a frame clock, the PLL eliminates the need for a separate high frequency master clock in the system. The ADAU1977 is available in a 40-lead LFCSP package.ApplicationsAutomotive audio systemsActive Noise Cancellation System |
ADAU1979Quad Analog-to-Digital Converter (ADC) | Data Acquisition | 1 | Active | The ADAU1979 incorporates four high performance, analog-to-digital converters (ADCs) with 4.5 V rms capable ac-coupled inputs. The ADCs use a multibit sigma-delta (Σ-Δ) architecture with continuous time front end for low EMI. An I2C/serial peripheral interface (SPI) control port is included that allows a microcontroller to adjust volume and many other parameters. The ADAU1979 uses only a single 3.3 V supply. The device internally generates the required digital DVDD supply. The low power architecture reduces the power consumption. The on-chip PLL can derive the master clock from an external clock input or frame clock (sample rate clock). When fed with the frame clock, it eliminates the need for a separate high frequency master clock in the system. The ADAU1979 is available in a 40-lead LFCSP package.Note that throughout the data sheet, multifunction pins, such as SCL/CCLK, are referred to either by the entire pin name or by a single function of the pin, for example, CCLK, when only that function is relevant.ApplicationsAutomotive audio systemsActive noise cancellation systems |
