Analog Devices Inc./Maxim Integrated

The MAX9394/MAX9395 consist of a 2:1 multiplexer and a 1:2 demultiplexer with loopback. The multiplexer section (channel B) accepts two low-voltage differential signaling (LVDS) inputs and generates a single LVDS output. The demultiplexer section (channel A) accepts a single LVDS input and generates two parallel LVDS outputs. The MAX9394/MAX9395 feature a loopback mode that connects the input of channel A to the output of channel B and connects the selected input of channel B to the outputs of channel A.Three LVCMOS/LVTTL logic inputs control the internal connections between inputs and outputs, one for the multiplexer portion of channel B (BSEL), and the other two for loopback control of channels A and B (LB_SELAand LB_SELB). Independent enable inputs for each differential output pair provide additional flexibility.Fail-safe circuitry forces the outputs to a differential low condition for undriven inputs or when the common-mode voltage exceeds the specified range. The MAX9394 provides high-level input fail-safe detection for HSTL, LVDS, and other GND-referenced differential inputs. The MAX9395 provides low-level fail-safe detection for CML, LVPECL, and other VCC-referenced differential inputs.Ultra low 91psP-P(max) pseudorandom bit sequence (PRBS) jitter ensures reliable communications in high-speed links that are highly sensitive to timing error, especially those incorporating clock-and-data recovery, or serializers and deserializers. The high-speed switching performance guarantees 1.5GHz operation and less than 87ps (max) skew between channels.LVDS inputs and outputs are compatible with the TIA/EIA-644 LVDS standard. The LVDS outputs drive 100Ω loads. The MAX9394/MAX9395 are offered in a 32-pin TQFP package and operate over the extended temperature range (-40°C to +85°C).ApplicationsCentral Office Backplane Clock DistributionDSLAMFault-Tolerant SystemsHigh-Speed Telecom/Datacom EquipmentProtection Switching

The MAX9406 high-speed, low-skew, quad differential input to current-mode logic (CML) translator features high-speed signal conversion of the DisplayPort™ (DP) to High-Definition Multimedia Interface (HDMI™) technology. This device features ultra-low propagation delay of 350ps and channel-to-channel skew of less than 20ps. The MAX9406 supports typical data rates of 2Gbps.The MAX9406 provides the level shift for HDMI's Display Data Channel (DDC) and hot-plug detection (HPD), which converts the 5V single-ended logic to 3.3V single-ended logic.The MAX9406 operates from a 3V to 3.6V core supply and is specified over the -40°C to +85°C extended temperature range. This device is available in 48-pin, 7mmx 7mm thin QFN and 32-pin, 5mm x 5mm thin QFN packages.ApplicationsATEBackplane Data and Clock DistributionBase StationsData and Clock Driver and BufferLevel Conversion for DP to HDMI

The MAX941/MAX942/MAX944 are single/dual/quad high-speed comparators optimized for systems powered from a 3V or 5V supply. These devices combine high speed, low power, and rail-to-rail inputs. Propagation delay is 80ns, while supply current is only 350µA per comparator.The input common-mode range of the MAX941/MAX942/MAX944 extends beyond both power-supply rails. The outputs pull to within 0.4V of either supply rail without external pullup circuitry, making these devices ideal for interface with both CMOS and TTL logic. All input and output pins can tolerate a continuous short-circuit fault condition to either rail.Internal hysteresis ensures clean output switching, even with slow-moving input signals. The MAX941 features latch enable and device shutdown.The single MAX941 and dual MAX942 are offered in a tiny µMAX® package. Both the single and dual MAX942 are available in 8-pin DIP and SO packages. The quad MAX944 comes in 14-pin DIP and narrow SO packages.Applications3V/5V SystemsBattery-Powered SystemsLine ReceiversSampling CircuitsThreshold Detectors/DiscriminatorsZero-Crossing Detectors