Analog Devices Inc./Maxim Integrated

The MAX1437B octal, 12-bit analog-to-digital converter (ADC) features fully differential inputs, a pipelined architecture, and digital error correction incorporating a fully differential signal path. This ADC is optimized for low-power and high-dynamic performance in medical imaging instrumentation and digital communications applications. The MAX1437B operates from a 1.8V single supply and consumes only 768mW (96mW per channel) while delivering a 70.2dB (typ) signal-to-noise ratio (SNR) at a 5.3MHz input frequency. In addition to low operating power, the MAX1437B features a low-power standby mode for idle periods.An internal 1.24V precision bandgap reference sets the full-scale range of the ADC. A flexible reference structure allows the use of an external reference for applications requiring increased accuracy or a different input voltage range. The reference architecture is optimized for low noise.A single-ended clock controls the data-conversion process. An internal duty-cycle equalizer compensates for wide variations in clock duty cycle. An on-chip phase-locked loop (PLL) generates the high-speed serial low-voltage differential signal (LVDS) clock.The MAX1437B has self-aligned serial LVDS outputs for data, clock, and frame-alignment signals. The output data is presented in two's complement format.The MAX1437B offers a maximum sample rate of 50Msps. This device is available in a small, 10mm x 10mm x 0.8mm, 68-pin TQFN package with exposed pad and is specified for the extended industrial (-40°C to +85°C) temperature range.ApplicationsInstrumentationMultichannel CommunicationsUltrasound and Medical Imaging

The MAX1438 octal, 12-bit analog-to-digital converter (ADC) features fully differential inputs, a pipelined architecture, and digital error correction incorporating a fully differential signal path. This ADC is optimized for low-power and high-dynamic performance in medical imaging instrumentation and digital communications applications. The MAX1438 operates from a 1.8V single supply and consumes only 913mW (114mW per channel) while delivering a 69.9dB (typ) signal-to-noise ratio (SNR) at a 5.3MHz input frequency. In addition to low operating power, the MAX1438 features a power-down mode for idle periods.An internal 1.24V precision bandgap reference sets the full-scale range of the ADC. A flexible reference structure allows the use of an external reference for applications requiring increased accuracy or a different input voltage range. The reference architecture is optimized for low noise.A single-ended clock controls the data-conversion process. An internal duty-cycle equalizer compensates for wide variations in clock duty cycle. An on-chip PLL generates the high-speed serial low-voltage differential signal (LVDS) clock.The MAX1438 has self-aligned serial LVDS outputs for data, clock, and frame-alignment signals. The output data is presented in two's complement or binary format.The MAX1438 offers a maximum sample rate of 65Msps. See thePin-Compatible Versionstable in the full data sheet for lower-speed versions. This device is available in a small, 14mm x 14mm x 1mm, 100-pin TQFP package with exposed pad and is specified for the extended industrial (-40°C to +85°C) temperature range.ApplicationsInstrumentationMultichannel CommunicationsUltrasound and Medical Imaging

The MAX1438B octal, 12-bit analog-to-digital converter (ADC) features fully differential inputs, a pipelined architecture, and digital error correction incorporating a fully differential signal path. This ADC is optimized for low-power and high-dynamic performance in medical imaging instrumentation and digital communications applications. The MAX1438B operates from a 1.8V single supply and consumes only 913mW (114mW per channel) while delivering a 69.9dB (typ) signal-to-noise ratio (SNR) at a 5.3MHz input frequency. In addition to low operating power, the MAX1438B features a low-power standby mode for idle periods.An internal 1.24V precision bandgap reference sets the full-scale range of the ADC. A flexible reference structure allows the use of an external reference for applications requiring increased accuracy or a different input voltage range. The reference architecture is optimized for low noise.A single-ended clock controls the data-conversion process. An internal duty-cycle equalizer compensates for wide variations in clock duty cycle. An on-chip phase-locked loop (PLL) generates the high-speed serial low-voltage differential signal (LVDS) clock.The MAX1438B has self-aligned serial LVDS outputs for data, clock, and frame-alignment signals. The output data is presented in two's-complement format.The MAX1438B offers a maximum sample rate of 64Msps. This device is available in a small, 10mm x 10mm x 0.8mm, 68-pin thin QFN package with exposed pad and is specified for the extended industrial (-40°C to +85°C) temperature range.ApplicationsInstrumentationMultichannel CommunicationsUltrasound and Medical Imaging