DS90UB926Q-Q1 Series

5-85 MHz 24-bit Color FPD-Link III Deserializer with Bidirectional Control Channel

Catalog

5-85 MHz 24-bit Color FPD-Link III Deserializer with Bidirectional Control Channel

Part	Supplier Device Package	Grade	Package / Case	Qualification	Number of Outputs	Number of Inputs	Function	Data Rate	Voltage - Supply [Max]	Voltage - Supply [Min]	Input Type	Operating Temperature [Max]	Operating Temperature [Min]	Mounting Type	Output Type	Secondary Attributes	Type	Contents	Utilized IC / Part	Supplied Contents
Texas Instruments DS90UB926QSQE/NOPB	60-WQFN (9x9)	Automotive	60-WFQFN Exposed Pad	AEC-Q100	24	1	Deserializer	2.975 Gbps	1.89 V 3.6 V	1.71 V 3 V	FPD-Link III LVDS	105 °C	-40 °C	Surface Mount	LVCMOS
Texas Instruments DS90UB926QSQ/NOPB	60-WQFN (9x9)	Automotive	60-WFQFN Exposed Pad	AEC-Q100	24	1	Deserializer	2.975 Gbps	1.89 V 3.6 V	1.71 V 3 V	FPD-Link III LVDS	105 °C	-40 °C	Surface Mount	LVCMOS
Texas Instruments DS90UB926QSQX/NOPB	60-WQFN (9x9)	Automotive	60-WFQFN Exposed Pad	AEC-Q100	24	1	Deserializer	2.975 Gbps	1.89 V 3.6 V	1.71 V 3 V	FPD-Link III LVDS	105 °C	-40 °C	Surface Mount	LVCMOS
Texas Instruments DS90UB926QSEVB/NOPB							Deserializer									I2C Interface(s)	Interface	Board(s) Cable(s)	DS90UB926Q	Board(s) Cable(s)

Catalog

5-85 MHz 24-bit Color FPD-Link III Deserializer with Bidirectional Control Channel

Key Features

• AEC-Q100 Qualified for Automotive ApplicationsDevice Temperature Grade 2: –40°C to +105°C Ambient Operating TemperatureDevice HBM ESD Classification Level 3BDevice CDM ESD Classification Level C6Device MM ESD Classification Level M3Bidirectional Control Interface Channel Interface With I2C-Compatible Serial Control BusSupports High-Definition (720p) Digital Video FormatRGB888 + VS, HS, DE and Synchronized I2S Audio Supported5- to 85-MHz PCLK SupportedSingle 3.3-V Operation With 1.8-V or 3.3-V Compatible LVCMOS I/O InterfaceAC-Coupled STP Interconnect up to 10 MetersParallel LVCMOS Video OutputsI2C-Compatible Serial Control Bus for ConfigurationDC-Balanced and Scrambled Data With Embedded ClockAdaptive Cable EqualizationSupports Repeater Application@ SPEED Link BIST Mode and LOCK Status PinImage Enhancement (White Balance and Dithering) and Internal Pattern GenerationEMI Minimization (SSCG and EPTO)Low Power Modes Minimize Power DissipationBackward-Compatible With FPD-Link IIAEC-Q100 Qualified for Automotive ApplicationsDevice Temperature Grade 2: –40°C to +105°C Ambient Operating TemperatureDevice HBM ESD Classification Level 3BDevice CDM ESD Classification Level C6Device MM ESD Classification Level M3Bidirectional Control Interface Channel Interface With I2C-Compatible Serial Control BusSupports High-Definition (720p) Digital Video FormatRGB888 + VS, HS, DE and Synchronized I2S Audio Supported5- to 85-MHz PCLK SupportedSingle 3.3-V Operation With 1.8-V or 3.3-V Compatible LVCMOS I/O InterfaceAC-Coupled STP Interconnect up to 10 MetersParallel LVCMOS Video OutputsI2C-Compatible Serial Control Bus for ConfigurationDC-Balanced and Scrambled Data With Embedded ClockAdaptive Cable EqualizationSupports Repeater Application@ SPEED Link BIST Mode and LOCK Status PinImage Enhancement (White Balance and Dithering) and Internal Pattern GenerationEMI Minimization (SSCG and EPTO)Low Power Modes Minimize Power DissipationBackward-Compatible With FPD-Link II

Description

The DS90UB926Q-Q1 deserializer, in conjunction with the DS90UB925Q-Q1 serializer, provides a complete digital interface for concurrent transmission of high-speed video, audio, and control data for automotive display and image-sensing applications. This chipset translates a parallel RGB video interface into a single-pair high-speed serialized interface. The serial bus scheme, FPD-Link III, supports full duplex of high-speed forward data transmission and low-speed backchannel communication over a single differential link. Consolidation of video data and control over a single differential pair reduces the interconnect size and weight, while also eliminating skew issues and simplifying system design. The DS90UB926Q-Q1 deserializer recovers the RGB data, three video control signals, and four synchronized I2S audio signals. The device extracts the clock from a high-speed serial stream. An output LOCK pin provides the link status if the incoming data stream is locked, without the use of a training sequence or special SYNC patterns, as well as a reference clock. The DS90UB926Q-Q1 deserializer has a 31-bit parallel LVCMOS output interface to accommodate the RGB, video control, and audio data. An adaptive equalizer optimizes the maximum cable reach. EMI is minimized by output SSC generation (SSCG) and enhanced progressive turnon (EPTO) features. The DS90UB926Q-Q1 deserializer, in conjunction with the DS90UB925Q-Q1 serializer, provides a complete digital interface for concurrent transmission of high-speed video, audio, and control data for automotive display and image-sensing applications. This chipset translates a parallel RGB video interface into a single-pair high-speed serialized interface. The serial bus scheme, FPD-Link III, supports full duplex of high-speed forward data transmission and low-speed backchannel communication over a single differential link. Consolidation of video data and control over a single differential pair reduces the interconnect size and weight, while also eliminating skew issues and simplifying system design. The DS90UB926Q-Q1 deserializer recovers the RGB data, three video control signals, and four synchronized I2S audio signals. The device extracts the clock from a high-speed serial stream. An output LOCK pin provides the link status if the incoming data stream is locked, without the use of a training sequence or special SYNC patterns, as well as a reference clock. The DS90UB926Q-Q1 deserializer has a 31-bit parallel LVCMOS output interface to accommodate the RGB, video control, and audio data. An adaptive equalizer optimizes the maximum cable reach. EMI is minimized by output SSC generation (SSCG) and enhanced progressive turnon (EPTO) features.