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DRV8106-Q1

DRV8106-Q1 Series

Automotive, 40V, half-bridge smart gate driver w/offline diagnostics and inline current sense amp

Manufacturer: Texas Instruments

Catalog

Automotive, 40V, half-bridge smart gate driver w/offline diagnostics and inline current sense amp

Key Features

AEC-Q100 qualified for automotive applications:Temperature grade 1: –40°C to +125°C, TAHalf-bridge smart gate driver4.9-V to 37-V (40-V abs. max) operating rangeDoubler charge pump for 100% PWMPin to pin gate driver variantsDRV8705-Q1:H-bridge with low-side amplifierDRV8706-Q1:H-bridge with inline amplifierSmart gate drive architectureAdjustable slew rate control0.5-mA to 62-mA peak source current output0.5-mA to 62-mA peak sink current outputIntegrated dead-time handshakingWide common mode current shunt amplifierSupports inline, high-side, or low-sideAdjustable gain settings (10, 20, 40, 80 V/V)Integrated feedback resistorsAdjustable PWM blanking schemeMultiple interface options availableSPI: Detailed configuration and diagnosticsH/W: Simplified control and less MCU pinsSpread spectrum clocking for EMI reductionCompact VQFN package with wettable flanksIntegrated protection featuresDedicated driver disable pin (DRVOFF)Supply and regulator voltage monitorsMOSFET VDSovercurrent monitorsMOSFET VGSgate fault monitorsCharge pump for reverse polarity MOSFETOffline open load and short circuit diagnosticsDevice thermal warning and shutdownFault condition interrupt pin (nFAULT)AEC-Q100 qualified for automotive applications:Temperature grade 1: –40°C to +125°C, TAHalf-bridge smart gate driver4.9-V to 37-V (40-V abs. max) operating rangeDoubler charge pump for 100% PWMPin to pin gate driver variantsDRV8705-Q1:H-bridge with low-side amplifierDRV8706-Q1:H-bridge with inline amplifierSmart gate drive architectureAdjustable slew rate control0.5-mA to 62-mA peak source current output0.5-mA to 62-mA peak sink current outputIntegrated dead-time handshakingWide common mode current shunt amplifierSupports inline, high-side, or low-sideAdjustable gain settings (10, 20, 40, 80 V/V)Integrated feedback resistorsAdjustable PWM blanking schemeMultiple interface options availableSPI: Detailed configuration and diagnosticsH/W: Simplified control and less MCU pinsSpread spectrum clocking for EMI reductionCompact VQFN package with wettable flanksIntegrated protection featuresDedicated driver disable pin (DRVOFF)Supply and regulator voltage monitorsMOSFET VDSovercurrent monitorsMOSFET VGSgate fault monitorsCharge pump for reverse polarity MOSFETOffline open load and short circuit diagnosticsDevice thermal warning and shutdownFault condition interrupt pin (nFAULT)

Description

AI
The DRV8106-Q1 is a highly integrated half-bridge gate driver, capable of driving high-side and low-side N-channel power MOSFETs. It generates the proper gate drive voltages using an integrated doubler charge pump for the high-side and a linear regulator for the low-side. The device uses a smart gate drive architecture to reduce system cost and improve reliability. The gate driver optimizes dead time to avoid shoot-through conditions, provides control to decreasing electromagnetic interference (EMI) through adjustable gate drive current, and protects against drain to source and gate short conditions with VDSand VGSmonitors. A wide common mode shunt amplifier provides inline current sensing to continuously measure motor current even during recirculating windows. The amplifier can be used in low-side or high-side sense configurations if inline sensing is not required. The DRV8106-Q1 provide an array of protection features to ensure robust system operation. These include under and overvoltage monitors for the power supply and charge pump, VDSovercurrent and VGSgate fault monitors for the external MOSFETs, offline open load and short circuit diagnostics, and internal thermal warning and shutdown protection. The DRV8106-Q1 is a highly integrated half-bridge gate driver, capable of driving high-side and low-side N-channel power MOSFETs. It generates the proper gate drive voltages using an integrated doubler charge pump for the high-side and a linear regulator for the low-side. The device uses a smart gate drive architecture to reduce system cost and improve reliability. The gate driver optimizes dead time to avoid shoot-through conditions, provides control to decreasing electromagnetic interference (EMI) through adjustable gate drive current, and protects against drain to source and gate short conditions with VDSand VGSmonitors. A wide common mode shunt amplifier provides inline current sensing to continuously measure motor current even during recirculating windows. The amplifier can be used in low-side or high-side sense configurations if inline sensing is not required. The DRV8106-Q1 provide an array of protection features to ensure robust system operation. These include under and overvoltage monitors for the power supply and charge pump, VDSovercurrent and VGSgate fault monitors for the external MOSFETs, offline open load and short circuit diagnostics, and internal thermal warning and shutdown protection.