100EL32 Series

Catalog

MULTIPLIER/DIVIDER, DIVIDE BY 2, 1 INPUT, 3 GHZ, 3.3 V TO 5 V, 8 PINS, SOIC

Part	Count Rate	Voltage - Supply (Minimum)	Voltage - Supply (Maximum)	Mounting Type	Reset	Package Name	Logic Type	Trigger Type	Number of Elements	Package Length	Package Width	Operating Temperature (Min)	Operating Temperature (Max)	Number of Bits per Element
Microchip Technology SY100EL32VZG	3 GHz	3.3 V	5 V	Surface Mount	Asynchronous	8-SOIC	Divide-by-2	Negative Positive	1	0.154 in	3.9 mm	-40 °C	85 °C	1 bits
Microchip Technology SY100EL32VZI	3 GHz	3.3 V	5 V	Surface Mount	Asynchronous	8-SOIC	Divide-by-2	Negative Positive	1	0.154 in	3.9 mm	-40 °C	85 °C	1 bits
Microchip Technology SY100EL32VZC	3 GHz	3.3 V	5 V	Surface Mount	Asynchronous	8-SOIC	Divide-by-2	Negative Positive	1	0.154 in	3.9 mm	-40 °C	85 °C	1 bits
Microchip Technology SY100EL32VZI-TR	3 GHz	3.3 V	5 V	Surface Mount	Asynchronous	8-SOIC	Divide-by-2	Negative Positive	1	0.154 in	3.9 mm	-40 °C	85 °C	1 bits

Catalog

Description

The SY100EL32V is an integrated divide by 2 divider. The differential clock inputs and the VBB allow a differential, single-ended or AC-coupled interface to the device. If used, the VBB output should be bypassed to ground with a 0.01 µF capacitor. Also note that the VBB is designed to be used as an input bias on the EL32V only; the VBB output has limited current sink and source capability. The Reset pin is asynchronous and is asserted on the rising edge. Upon power-on, the internal flip-flop will attain a random state. The Reset allows for the synchronization of multiple EL32Vs in a system.