MC100EP32 Series

3.3 V / 5.0 V ECL ÷·2 Divider

Catalog

3.3 V / 5.0 V ECL ÷·2 Divider

Part	Number of Elements	Voltage - Supply [Max]	Voltage - Supply [Min]	Count Rate	Number of Bits per Element	Logic Type	Package / Case	Package / Case [custom]	Package / Case	Mounting Type	Operating Temperature [Max]	Operating Temperature [Min]	Trigger Type	Reset	Supplier Device Package	Package / Case [y]	Package / Case [x]
ON Semiconductor MC100EP32DT	1	5.5 V	3 V	4 GHz	1	Divide-by-2	8-MSOP 8-TSSOP	0.118 in	3 mm	Surface Mount	85 °C	-40 °C	Negative Positive	Asynchronous	8-TSSOP
ON Semiconductor MC100EP32DTR2 REEL
ON Semiconductor MC100EP32DTR2G	1	5.5 V	3 V	4 GHz	1	Divide-by-2	8-MSOP 8-TSSOP	0.118 in	3 mm	Surface Mount	85 °C	-40 °C	Negative Positive	Asynchronous	8-TSSOP
ON Semiconductor MC100EP32DR2G	1	5.5 V	3 V	4 GHz	1	Divide-by-2	8-SOIC			Surface Mount	85 °C	-40 °C	Negative Positive	Asynchronous	8-SOIC	3.9 mm	0.154 in
ON Semiconductor MC100EP32DR2	1	5.5 V	3 V	4 GHz	1	Divide-by-2	8-SOIC			Surface Mount	85 °C	-40 °C	Negative Positive	Asynchronous	8-SOIC	3.9 mm	0.154 in
ON Semiconductor MC100EP32MNR4G	1	5.5 V	3 V	4 GHz	1	Divide-by-2	8-VFDFN Exposed Pad			Surface Mount	85 °C	-40 °C	Negative Positive	Asynchronous	8-DFN (2x2)
ON Semiconductor MC100EP32DTG	1	5.5 V	3 V	4 GHz	1	Divide-by-2	8-MSOP 8-TSSOP	0.118 in	3 mm	Surface Mount	85 °C	-40 °C	Negative Positive	Asynchronous	8-TSSOP
ON Semiconductor MC100EP32DG	1	5.5 V	3 V	4 GHz	1	Divide-by-2	8-SOIC			Surface Mount	85 °C	-40 °C	Negative Positive	Asynchronous	8-SOIC	3.9 mm	0.154 in

Catalog

3.3 V / 5.0 V ECL ÷·2 Divider

Key Features

• 350ps Typical Propagation Delay

• Maximum Frequency > 4 GHz Typical

• PECL Mode Operating Range: VCC= 3.0 V to 5.5 Vwith VEE= 0 V

• NECL Mode Operating Range: VCC= 0 Vwith VEE= –3.0 V to –5.5 V

• Open Input Default State

• Safety Clamp on Inputs

• Q Output will default LOW with inputs open or at VEE

• Pb-Free Packages are Available

Description

The MC10/100EP32 is an integrated divide by 2 divider with differential CLK inputs.The VBBpin, an internally generated voltage supply, is available to this device only. For single-ended input conditions, the unused differential input is connected to VBBas a switching reference voltage. VBBmay also rebias AC coupled inputs. When used, decouple VBBand VCCvia a 0.01μF capacitor and limit current sourcing or sinking to 0.5mA. When not used, VBBshould be left open.The reset pin is asynchronous and is asserted on the rising edge. Upon power-up, the internal flip-flops will attain a random state; the reset allows for the synchronization of multiple EP32's in a system.The 100 Series contains temperature compensation.