Catalog
2.3 GHz to 2.7 GHz, Receiver Front End
Key Features
• Integrated RF front end
• LNA and high-power silicon SPDT switch
• On-chip bias and matching
• Single-supply operation
• Gain: 35.5 dB typical at 2.6 GHz
• Gain flatness: 0.2 dB at 25°C across 400 MHz bandwidth
• Low noise figure: 1.2 dB typical at 2.6 GHz
• Low insertion loss: 0.7 dB typical at 2.6 GHz
• High-power handling at TCASE= 105°C
• Full lifetime
• LTE average power (8 dB PAR): 36.5 dBm
• Single event (<10 sec operation)
• LTE average power (8 dB PAR): 39 dBm
• High Input IP3: −4 dBm
• Low-supply current
• Receive operation: 118 mA typical at 5 V
• Transmit operation: 15 mA typical at 5 V
• Positive logic control
• 5 mm × 3 mm, 24-lead LFCSP package
• Pin compatible with the ADRF5534, 3.1 GHz to 4.2 GHz receiver front end
Description
AI
The ADRF5532 is an integrated RF, front-end multichip module designed for time division duplex (TDD) applications. The device operates from 2.3 GHz to 2.7 GHz. The ADRF5532 is configured with a low-noise amplifier (LNA) and a high-power, silicon, single pole double throw (SPDT) switch.In the receive operation at 2.6 GHz, the LNA offers a low noise figure (NF) of 1.2 dB and a high gain of 35.5 dB with a third order input intercept point (IIP3) of −4 dBm.In the transmit operation, the switch provides a low insertion loss of 0.7 dB and handles a long-term evolution (LTE) average power of 36.5 dBm for a full lifetime operation (8 dB peak to average ratio (PAR)) and 39 dBm for a single event (<10 sec) LNA protection operation.The device is featured in an RoHS compliant, compact, 5 mm × 3 mm, 24-lead LFCSP package.APPLICATIONSWireless infrastructureTDD massive multiple input and multiple output (MIMO) and active antenna systemsTDD-based communication systems