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Integrated Circuits (ICs)

SN74AHC165PWR

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Texas Instruments

8-BIT 2-V TO 5.5-V PARALLEL-IN/SERIAL-OUT SHIFT REGISTER

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TSSOP (PW)
Integrated Circuits (ICs)

SN74AHC165PWR

Active
Texas Instruments

8-BIT 2-V TO 5.5-V PARALLEL-IN/SERIAL-OUT SHIFT REGISTER

Technical Specifications

Parameters and characteristics for this part

SpecificationSN74AHC165PWR
FunctionParallel or Serial to Serial
Logic TypeShift Register
Mounting TypeSurface Mount
Number of Bits per Element8
Number of Elements1
Operating Temperature [Max]125 °C
Operating Temperature [Min]-40 °C
Output TypeComplementary
Package / Case16-TSSOP
Package / Case [x]0.173 in
Package / Case [y]4.4 mm
Supplier Device Package16-TSSOP
Voltage - Supply [Max]5.5 V
Voltage - Supply [Min]2 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyCut Tape (CT) 1$ 0.44
10$ 0.38
25$ 0.35
100$ 0.28
250$ 0.26
500$ 0.22
1000$ 0.17
Digi-Reel® 1$ 0.44
10$ 0.38
25$ 0.35
100$ 0.28
250$ 0.26
500$ 0.22
1000$ 0.17
Tape & Reel (TR) 3000$ 0.16
6000$ 0.15
15000$ 0.14
30000$ 0.13
75000$ 0.13
Texas InstrumentsLARGE T&R 1$ 0.29
100$ 0.20
250$ 0.15
1000$ 0.10

Description

General part information

SN74AHC165 Series

The SN74AHC165 device contains an 8-bit serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. The storage register has parallel 3-state outputs. Separate clocks are provided for both the shift and storage registers. The shift register has a direct overriding clear ( SRCLR) input, a serial (SER) input, and a serial output for cascading. When the output-enable ( OE) input is high, all outputs except QH′ are in the high-impedance state.

The SN74AHC165 device contains an 8-bit serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. The storage register has parallel 3-state outputs. Separate clocks are provided for both the shift and storage registers. The shift register has a direct overriding clear ( SRCLR) input, a serial (SER) input, and a serial output for cascading. When the output-enable ( OE) input is high, all outputs except QH′ are in the high-impedance state.