SN74AHC165 Series

8-bit 2-V to 5.5-V parallel-in/serial-out shift register

Catalog

8-bit 2-V to 5.5-V parallel-in/serial-out shift register

Part	Number of Bits per Element	Operating Temperature [Max]	Operating Temperature [Min]	Function	Mounting Type	Supplier Device Package	Output Type	Package / Case [x]	Package / Case	Package / Case [y]	Number of Elements	Logic Type	Voltage - Supply [Max]	Voltage - Supply [Min]
Texas Instruments SN74AHC165PWR	8	125 °C	-40 °C	Parallel or Serial to Serial	Surface Mount	16-TSSOP	Complementary	0.173 in	16-TSSOP	4.4 mm	1	Shift Register	5.5 V	2 V
Texas Instruments SN74AHC165BQBR	8	125 °C	-40 °C	Parallel or Serial to Serial	Surface Mount	16-WQFN (2.5x3.5)	Complementary		16-WFQFN Exposed Pad		1	Shift Register	5.5 V	2 V

Catalog

8-bit 2-V to 5.5-V parallel-in/serial-out shift register

Key Features

• Operating range 2-V to 5.5-V V CCLow delay, 6 ns (25°C, 5 V)Latch-up performance exceeds 250 mA per JESD 17Operating range 2-V to 5.5-V V CCLow delay, 6 ns (25°C, 5 V)Latch-up performance exceeds 250 mA per JESD 17

Description

The SN74AHC165 device contains an 8-bit serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. The storage register has parallel 3-state outputs. Separate clocks are provided for both the shift and storage registers. The shift register has a direct overriding clear ( SRCLR) input, a serial (SER) input, and a serial output for cascading. When the output-enable ( OE) input is high, all outputs except QH′ are in the high-impedance state. The SN74AHC165 device contains an 8-bit serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. The storage register has parallel 3-state outputs. Separate clocks are provided for both the shift and storage registers. The shift register has a direct overriding clear ( SRCLR) input, a serial (SER) input, and a serial output for cascading. When the output-enable ( OE) input is high, all outputs except QH′ are in the high-impedance state.