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Analog Devices-AD9248BCPZRL-65 Analog to Digital Converters - ADCs 2-Channel Dual ADC Pipelined 65Msps 14-bit Parallel 64-Pin LFCSP EP T/R
Integrated Circuits (ICs)

AD9267BCPZ

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Analog Devices

2-CHANNEL DUAL ADC DELTA-SIGMA 640MSPS 16-BIT PARALLEL/SERIAL (SPI)/LVDS 64-PIN LFCSP EP TRAY

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Analog Devices-AD9248BCPZRL-65 Analog to Digital Converters - ADCs 2-Channel Dual ADC Pipelined 65Msps 14-bit Parallel 64-Pin LFCSP EP T/R
Integrated Circuits (ICs)

AD9267BCPZ

Active
Analog Devices

2-CHANNEL DUAL ADC DELTA-SIGMA 640MSPS 16-BIT PARALLEL/SERIAL (SPI)/LVDS 64-PIN LFCSP EP TRAY

Technical Specifications

Parameters and characteristics for this part

SpecificationAD9267BCPZ
ApplicationsWireless Communication Systems
Mounting TypeSurface Mount
Package / Case64-VFQFN Exposed Pad, CSP
Supplier Device Package64-LFCSP-VQ (9x9)
TypeSigma-Delta Modulator

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyTray 10$ 66.85

Description

General part information

AD9267 Series

The AD9267 is a dual continuous time (CT) sigma-delta (Σ-Δ) modulator with -88 dBc of dynamic range over 10 MHz real or 20 MHz complex bandwidth. The combination of high dynamic range, wide bandwidth, and characteristics unique to the continuous time Σ-Δ modulator architecture makes the AD9267 an ideal solution for wireless communication systems.The AD9267 has a resistive input impedance that significantly relaxes the requirements of the driver amplifier. In addition, a 32× oversampled fifth-order continuous time loop filter attenuates out-of-band signals and aliases, reducing the need for external filters at the input. The low noise figure of 15 dB relaxes the linearity requirements of the front-end signal chain components, and the high dynamic range reduces the need for an automatic gain control (AGC) loop.A differential input clock controls all internal conversion cycles. An external clock input or the integrated integer-N PLL provides the 640 MHz internal clock needed for the oversampled conti- nuous time Σ-Δ modulator. The digital output data is presented as 4-bit, LVDS at 640 MSPS in twos complement format. A data clock output (DCO) is provided to ensure proper latch timing with receiving logic. Additional digital signal processing may be required on the 4-bit modulator output to remove the out-of-band noise and to reduce the sample rate.The AD9267 operates on a 1.8 V power supply, consuming 416 mW. The AD9267 is available in a 64-lead LFCSP and is specified over the industrial temperature range (−40°C to +85°C).Product HighlightsContinuous time Σ-Δ architecture efficiently achieves high dynamic range and wide bandwidth.Passive input structure reduces or eliminates the require- ments for a driver amplifier.An oversampling ratio of 32× and high order loop filter provide excellent alias rejection, reducing or eliminating the need for antialiasing filters.Operates from a single 1.8 V power supply.A standard serial port interface (SPI) supports various product features and functions.Features a low pin count, high speed LVDS interface with data output clock.ApplicationsBaseband quadrature receivers: CDMA2000, W-CDMA, multicarrier GSM/EDGE, 802.16x, and LTEQuadrature sampling instrumentation