Specification	SN74AC00PWR

Current - Output High, Low	24 mA
Input Logic Level - High [Max]	3.85 V
Input Logic Level - High [Min]	2.1 V
Input Logic Level - Low [Max]	1.65 V
Input Logic Level - Low [Min]	0.9 V
Logic Type	NAND Gate
Mounting Type	Surface Mount
Number of Circuits	4
Number of Inputs	2
Operating Temperature [Max]	85 °C
Operating Temperature [Min]	-40 °C
Package / Case	14-TSSOP
Package / Case [custom]	0.173 "
Package / Case [custom]	4.4 mm
Supplier Device Package	14-TSSOP
Voltage - Supply [Max]	6 V
Voltage - Supply [Min]	2 V

CD74AC00 Series

4-ch, 2-input, 1.5-V to 5.5-V NAND gates

Part	Mounting Type	Number of Circuits	Number of Inputs	Voltage - Supply [Min]	Voltage - Supply [Max]	Package / Case	Package / Case	Package / Case	Logic Type	Supplier Device Package	Input Logic Level - Low [Max]	Input Logic Level - Low [Min]	Input Logic Level - High [Min]	Input Logic Level - High [Max]	Operating Temperature [Max]	Operating Temperature [Min]	Current - Output High, Low	Package / Case [y]	Package / Case [x]	Max Propagation Delay @ V, Max CL	Current - Quiescent (Max) [Max]	Package / Case [custom]	Package / Case [custom]
Texas Instruments SN74AC00DBRE4	Surface Mount	4	2	2 V	6 V	5.3 mm	14-SSOP	0.209 "	NAND Gate	14-SSOP	1.65 V	0.9 V	2.1 V	3.85 V	85 °C	-40 °C	24 mA
Texas Instruments SN74AC00N	Through Hole	4	2	2 V	6 V		14-DIP		NAND Gate		1.65 V	0.9 V	2.1 V	3.85 V	85 °C	-40 °C	24 mA	7.62 mm	0.3 "
Texas Instruments CD74AC00E	Through Hole	4	2	1.5 V	5.5 V		14-DIP		NAND Gate		1.65 V	0.3 V	1.2 V	3.85 V	125 °C	-55 °C	24 mA	7.62 mm	0.3 "	7.3 ns	4 µA
Texas Instruments CD74AC00M	Surface Mount	4	2	1.5 V	5.5 V		14-SOIC		NAND Gate		1.65 V	0.3 V	1.2 V	3.85 V	125 °C	-55 °C	24 mA	3.9 mm	0.154 in	7.3 ns	4 µA
Texas Instruments CD74AC00M96	Surface Mount	4	2	1.5 V	5.5 V		14-SOIC		NAND Gate		1.65 V	0.3 V	1.2 V	3.85 V	125 °C	-55 °C	24 mA	3.9 mm	0.154 in	7.3 ns	4 µA
Texas Instruments CD74AC00EG4	Through Hole	4	2	1.5 V	5.5 V		14-DIP		NAND Gate		1.65 V	0.3 V	1.2 V	3.85 V	125 °C	-55 °C	24 mA	7.62 mm	0.3 "	7.3 ns	4 µA
Texas Instruments SN74AC00DR	Surface Mount	4	2	2 V	6 V		14-SOIC		NAND Gate		1.65 V	0.9 V	2.1 V	3.85 V	85 °C	-40 °C	24 mA	3.9 mm	0.154 in
Texas Instruments SN74AC00PWR	Surface Mount	4	2	2 V	6 V		14-TSSOP		NAND Gate	14-TSSOP	1.65 V	0.9 V	2.1 V	3.85 V	85 °C	-40 °C	24 mA					0.173 "	4.4 mm
Texas Instruments SN74AC00NG4	Through Hole	4	2	2 V	6 V		14-DIP		NAND Gate		1.65 V	0.9 V	2.1 V	3.85 V	85 °C	-40 °C	24 mA	7.62 mm	0.3 "
Texas Instruments SN74AC00DBR	Surface Mount	4	2	2 V	6 V	5.3 mm	14-SSOP	0.209 "	NAND Gate	14-SSOP	1.65 V	0.9 V	2.1 V	3.85 V	85 °C	-40 °C	24 mA

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

Distributor	Package	Quantity	$

Digikey	Cut Tape (CT)	1	$ 0.58
		10	$ 0.50
		25	$ 0.47
		100	$ 0.37
		250	$ 0.35
		500	$ 0.29
		1000	$ 0.23
	Digi-Reel®	1	$ 0.58
		10	$ 0.50
		25	$ 0.47
		100	$ 0.37
		250	$ 0.35
		500	$ 0.29
		1000	$ 0.23
	Tape & Reel (TR)	2000	$ 0.18
		4000	$ 0.16
		6000	$ 0.17
		10000	$ 0.16
		14000	$ 0.16
		20000	$ 0.16
		50000	$ 0.14
Newark	Each (Supplied on Cut Tape)	1	$ 0.53
		10	$ 0.51
		25	$ 0.48
		50	$ 0.46
		100	$ 0.44
		250	$ 0.43
		500	$ 0.42
		1000	$ 0.41
TME	N/A	1	$ 0.63
		10	$ 0.44
		25	$ 0.40
		100	$ 0.34
		250	$ 0.31
		500	$ 0.29
Texas Instruments	LARGE T&R	1	$ 0.33
		100	$ 0.22
		250	$ 0.17
		1000	$ 0.11

Description

General part information

CD74AC00 Series

The ‘AC00 devices contain four independent 2-input NAND gates. Each gate performs the Boolean function of Y = A • B or Y = A + B in positive logic.

Documents

Technical documentation and resources

SN74AC00PWR

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SN74AC00PWR

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Technical Specifications

CD74AC00 Series

Pricing

Description

CD74AC00 Series

Documents

TI IBIS File Creation, Validation, and Distribution Processes

LOGIC Pocket Data Book (Rev. B)

Implications of Slow or Floating CMOS Inputs (Rev. E)

Semiconductor Packing Material Electrostatic Discharge (ESD) Protection

Input and Output Characteristics of Digital Integrated Circuits

SNx4AC00 Quadruple 2-Input Positive-NAND Gates datasheet (Rev. F)

Designing With Logic (Rev. C)

HiRel Unitrode Power Management Brochure

Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc

Live Insertion

Logic Guide (Rev. AB)

Discrete design of a low-cost isolated 3.3- to 5-V DC/DC converter

CMOS Power Consumption and CPD Calculation (Rev. B)

Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)

CD74AC00 Series