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Technical Specifications
Parameters and characteristics for this part
| Specification | CD74AC00E |
|---|---|
| Current - Output High, Low | 24 mA |
| Current - Quiescent (Max) [Max] | 4 µA |
| Input Logic Level - High [Max] | 3.85 V |
| Input Logic Level - High [Min] | 1.2 V |
| Input Logic Level - Low [Max] | 1.65 V |
| Input Logic Level - Low [Min] | 0.3 V |
| Logic Type | NAND Gate |
| Max Propagation Delay @ V, Max CL | 7.3 ns |
| Mounting Type | Through Hole |
| Number of Circuits | 4 |
| Number of Inputs | 2 |
| Operating Temperature [Max] | 125 °C |
| Operating Temperature [Min] | -55 °C |
| Package / Case | 14-DIP |
| Package / Case [x] | 0.3 " |
| Package / Case [y] | 7.62 mm |
| Voltage - Supply [Max] | 5.5 V |
| Voltage - Supply [Min] | 1.5 V |
CD74AC00 Series
4-ch, 2-input, 1.5-V to 5.5-V NAND gates
| Part | Mounting Type | Number of Circuits | Number of Inputs | Voltage - Supply [Min] | Voltage - Supply [Max] | Package / Case | Package / Case | Package / Case | Logic Type | Supplier Device Package | Input Logic Level - Low [Max] | Input Logic Level - Low [Min] | Input Logic Level - High [Min] | Input Logic Level - High [Max] | Operating Temperature [Max] | Operating Temperature [Min] | Current - Output High, Low | Package / Case [y] | Package / Case [x] | Max Propagation Delay @ V, Max CL | Current - Quiescent (Max) [Max] | Package / Case [custom] | Package / Case [custom] |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Texas Instruments | Surface Mount | 4 | 2 | 2 V | 6 V | 5.3 mm | 14-SSOP | 0.209 " | NAND Gate | 14-SSOP | 1.65 V | 0.9 V | 2.1 V | 3.85 V | 85 °C | -40 °C | 24 mA | ||||||
Texas Instruments | Through Hole | 4 | 2 | 2 V | 6 V | 14-DIP | NAND Gate | 1.65 V | 0.9 V | 2.1 V | 3.85 V | 85 °C | -40 °C | 24 mA | 7.62 mm | 0.3 " | |||||||
Texas Instruments | Through Hole | 4 | 2 | 1.5 V | 5.5 V | 14-DIP | NAND Gate | 1.65 V | 0.3 V | 1.2 V | 3.85 V | 125 °C | -55 °C | 24 mA | 7.62 mm | 0.3 " | 7.3 ns | 4 µA | |||||
Texas Instruments | Surface Mount | 4 | 2 | 1.5 V | 5.5 V | 14-SOIC | NAND Gate | 1.65 V | 0.3 V | 1.2 V | 3.85 V | 125 °C | -55 °C | 24 mA | 3.9 mm | 0.154 in | 7.3 ns | 4 µA | |||||
Texas Instruments | Surface Mount | 4 | 2 | 1.5 V | 5.5 V | 14-SOIC | NAND Gate | 1.65 V | 0.3 V | 1.2 V | 3.85 V | 125 °C | -55 °C | 24 mA | 3.9 mm | 0.154 in | 7.3 ns | 4 µA | |||||
Texas Instruments | Through Hole | 4 | 2 | 1.5 V | 5.5 V | 14-DIP | NAND Gate | 1.65 V | 0.3 V | 1.2 V | 3.85 V | 125 °C | -55 °C | 24 mA | 7.62 mm | 0.3 " | 7.3 ns | 4 µA | |||||
Texas Instruments | Surface Mount | 4 | 2 | 2 V | 6 V | 14-SOIC | NAND Gate | 1.65 V | 0.9 V | 2.1 V | 3.85 V | 85 °C | -40 °C | 24 mA | 3.9 mm | 0.154 in | |||||||
Texas Instruments | Surface Mount | 4 | 2 | 2 V | 6 V | 14-TSSOP | NAND Gate | 14-TSSOP | 1.65 V | 0.9 V | 2.1 V | 3.85 V | 85 °C | -40 °C | 24 mA | 0.173 " | 4.4 mm | ||||||
Texas Instruments | Through Hole | 4 | 2 | 2 V | 6 V | 14-DIP | NAND Gate | 1.65 V | 0.9 V | 2.1 V | 3.85 V | 85 °C | -40 °C | 24 mA | 7.62 mm | 0.3 " | |||||||
Texas Instruments | Surface Mount | 4 | 2 | 2 V | 6 V | 5.3 mm | 14-SSOP | 0.209 " | NAND Gate | 14-SSOP | 1.65 V | 0.9 V | 2.1 V | 3.85 V | 85 °C | -40 °C | 24 mA |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | Tube | 1 | $ 0.84 | |
| 10 | $ 0.74 | |||
| 25 | $ 0.70 | |||
| 100 | $ 0.57 | |||
| 250 | $ 0.53 | |||
| 500 | $ 0.45 | |||
| 936 | $ 0.32 | |||
| 1000 | $ 0.36 | |||
| 2500 | $ 0.33 | |||
| 5000 | $ 0.30 | |||
| Texas Instruments | TUBE | 1 | $ 0.70 | |
| 100 | $ 0.47 | |||
| 250 | $ 0.37 | |||
| 1000 | $ 0.24 | |||
Description
General part information
CD74AC00 Series
The ‘AC00 devices contain four independent 2-input NAND gates. Each gate performs the Boolean function of Y = A • B or Y = A + B in positive logic.
The ‘AC00 devices contain four independent 2-input NAND gates. Each gate performs the Boolean function of Y = A • B or Y = A + B in positive logic.
Documents
Technical documentation and resources