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24-SOIC
Integrated Circuits (ICs)

SN74ALS667DW

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Texas Instruments

OCTAL D-TYPE TRANSPARENT READ-BACK LATCHES WITH 3-STATE OUTPUTS

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24-SOIC
Integrated Circuits (ICs)

SN74ALS667DW

Active
Texas Instruments

OCTAL D-TYPE TRANSPARENT READ-BACK LATCHES WITH 3-STATE OUTPUTS

Deep-Dive with AI

DocumentsDatasheet

Technical Specifications

Parameters and characteristics for this part

SpecificationSN74ALS667DW
Circuit [custom]8
Circuit [custom]8
Current - Output High, Low [custom]400 µA
Current - Output High, Low [custom]8 mA
Delay Time - Propagation9 ns
Independent Circuits1
Logic TypeD-Type Transparent Latch
Mounting TypeSurface Mount
Operating Temperature [Max]70 °C
Operating Temperature [Min]0 °C
Output TypeTri-State
Package / Case24-SOIC
Package / Case [custom]7.5 mm
Package / Case [custom]0.295 in
Supplier Device Package24-SOIC
Voltage - Supply [Max]5.5 V
Voltage - Supply [Min]4.5 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyTube 50$ 26.97
Texas InstrumentsTUBE 1$ 27.64
100$ 24.57
250$ 20.20
1000$ 18.06

Description

General part information

SN74ALS667 Series

These 8-bit D-type transparent latches are designed specifically for storing the contents of the input data bus, plus reading back the stored data onto the input data bus. In addition, they provide a 3-state buffer-type output and are easily utilized in bus-structured applications.

While the latch enable (LE) is high, the Q outputs of the SN74ALS666 follow the data (D) inputs. The Q\ outputs of the SN74ALS667 provide the inverse of the data applied to its D inputs. The Q or Q\ output of both devices is in the high-impedance state if either output-enable (OE1\ or OE2\) input is at a high logic level.

Read back is provided through the read-back control (OERB\) input. When OERB\ is taken low, the data present at the output of the data latches passes back onto the input data bus. When OERB\ is taken high, the output of the data latches is isolated from the D inputs. OERB\ does not affect the internal operation of the latches; however, caution should be exercised to avoid a bus conflict.

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Technical documentation and resources