SN74ALS667 Series

Octal D-Type Transparent Read-Back Latches With 3-State Outputs

Catalog

Octal D-Type Transparent Read-Back Latches With 3-State Outputs

Part	Package / Case	Package / Case	Package / Case	Voltage - Supply [Min]	Voltage - Supply [Max]	Operating Temperature [Max]	Operating Temperature [Min]	Current - Output High, Low [custom]	Current - Output High, Low [custom]	Mounting Type	Supplier Device Package	Independent Circuits	Circuit [custom]	Circuit [custom]	Output Type	Logic Type	Delay Time - Propagation	Package / Case [custom]	Package / Case [custom]
Texas Instruments SN74ALS667NT3
Texas Instruments SN74ALS667NT	0.3 in	24-DIP	7.62 mm	4.5 V	5.5 V	70 °C	0 °C	400 µA	8 mA	Through Hole	24-PDIP	1	8	8	Tri-State	D-Type Transparent Latch	9 ns
Texas Instruments SN74ALS667DWRG4		24-SOIC		4.5 V	5.5 V	70 °C	0 °C	400 µA	8 mA	Surface Mount	24-SOIC	1	8	8	Tri-State	D-Type Transparent Latch	9 ns	7.5 mm	0.295 in
Texas Instruments SN74ALS667DW		24-SOIC		4.5 V	5.5 V	70 °C	0 °C	400 µA	8 mA	Surface Mount	24-SOIC	1	8	8	Tri-State	D-Type Transparent Latch	9 ns	7.5 mm	0.295 in

Catalog

Octal D-Type Transparent Read-Back Latches With 3-State Outputs

Key Features

• 3-State I/O-Type Read-Back InputsBus-Structured PinoutChoice of True or Inverting LogicSN74ALS666...True OutputsSN74ALS667...Inverted OutputsPreset and Clear InputsPackage Options Include Plastic Small-Outline (DW) Packages and Standard Plastic (NT) 300-mil DIPs3-State I/O-Type Read-Back InputsBus-Structured PinoutChoice of True or Inverting LogicSN74ALS666...True OutputsSN74ALS667...Inverted OutputsPreset and Clear InputsPackage Options Include Plastic Small-Outline (DW) Packages and Standard Plastic (NT) 300-mil DIPs

Description

These 8-bit D-type transparent latches are designed specifically for storing the contents of the input data bus, plus reading back the stored data onto the input data bus. In addition, they provide a 3-state buffer-type output and are easily utilized in bus-structured applications. While the latch enable (LE) is high, the Q outputs of the SN74ALS666 follow the data (D) inputs. The Q\ outputs of the SN74ALS667 provide the inverse of the data applied to its D inputs. The Q or Q\ output of both devices is in the high-impedance state if either output-enable (OE1\ or OE2\) input is at a high logic level. Read back is provided through the read-back control (OERB\) input. When OERB\ is taken low, the data present at the output of the data latches passes back onto the input data bus. When OERB\ is taken high, the output of the data latches is isolated from the D inputs. OERB\ does not affect the internal operation of the latches; however, caution should be exercised to avoid a bus conflict. The SN74ALS666 and SN74ALS667 are characterized for operation from 0°C to 70°C. These 8-bit D-type transparent latches are designed specifically for storing the contents of the input data bus, plus reading back the stored data onto the input data bus. In addition, they provide a 3-state buffer-type output and are easily utilized in bus-structured applications. While the latch enable (LE) is high, the Q outputs of the SN74ALS666 follow the data (D) inputs. The Q\ outputs of the SN74ALS667 provide the inverse of the data applied to its D inputs. The Q or Q\ output of both devices is in the high-impedance state if either output-enable (OE1\ or OE2\) input is at a high logic level. Read back is provided through the read-back control (OERB\) input. When OERB\ is taken low, the data present at the output of the data latches passes back onto the input data bus. When OERB\ is taken high, the output of the data latches is isolated from the D inputs. OERB\ does not affect the internal operation of the latches; however, caution should be exercised to avoid a bus conflict. The SN74ALS666 and SN74ALS667 are characterized for operation from 0°C to 70°C.