Specification	8512801RA

Circuit [custom]	8
Circuit [custom]	8
Current - Output High, Low [custom]	7.8 mA
Current - Output High, Low [custom]	7.8 mA
Delay Time - Propagation	23 ns
Independent Circuits	1
Logic Type	D-Type Transparent Latch
Mounting Type	Through Hole
Operating Temperature [Max]	125 °C
Operating Temperature [Min]	-55 °C
Output Type	Tri-State, Non-Inverted
Package / Case	20-CDIP
Supplier Device Package	20-CDIP
Voltage - Supply [Max]	6 V
Voltage - Supply [Min]	2 V

SN54HC573A Series

Octal D-type Transparent Latches With 3-State Outputs

Part	Output Type	Delay Time - Propagation	Current - Output High, Low [custom]	Current - Output High, Low [custom]	Operating Temperature [Min]	Operating Temperature [Max]	Independent Circuits	Supplier Device Package	Logic Type	Mounting Type	Circuit [custom]	Circuit [custom]	Package / Case	Voltage - Supply [Min]	Voltage - Supply [Max]
Texas Instruments 8512801RA	Non-Inverted Tri-State	23 ns	7.8 mA	7.8 mA	-55 °C	125 °C	1	20-CDIP	D-Type Transparent Latch	Through Hole	8	8	20-CDIP	2 V	6 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

Distributor	Package	Quantity	$

Texas Instruments	TUBE	1	$ 27.95
		100	$ 24.41
		250	$ 18.82
		1000	$ 16.84

Description

General part information

SN54HC573A Series

The SNx4HC573A devices are octal transparent D-type latches that feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.

While the latch-enable (LE) input is high, the Q outputs respond to the data (D) inputs. When LE is low, the outputs are latched to retain the data that was set up.

Documents

Technical documentation and resources

Datasheet

8512801RA

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8512801RA

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Technical Specifications

SN54HC573A Series

Pricing

Description

SN54HC573A Series

Documents

Datasheet

TI IBIS File Creation, Validation, and Distribution Processes

Power-Up Behavior of Clocked Devices (Rev. B)

Logic Guide (Rev. AB)

Input and Output Characteristics of Digital Integrated Circuits

Live Insertion

Semiconductor Packing Material Electrostatic Discharge (ESD) Protection

Signal Switch Data Book (Rev. A)

Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc

LOGIC Pocket Data Book (Rev. B)

CMOS Power Consumption and CPD Calculation (Rev. B)

Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)

SN54/74HCT CMOS Logic Family Applications and Restrictions

Implications of Slow or Floating CMOS Inputs (Rev. E)

Designing With Logic (Rev. C)

SN54HC573A Series