SN54HC573A Series

Octal D-type Transparent Latches With 3-State Outputs

Catalog

Octal D-type Transparent Latches With 3-State Outputs

Part	Output Type	Delay Time - Propagation	Current - Output High, Low [custom]	Current - Output High, Low [custom]	Operating Temperature [Min]	Operating Temperature [Max]	Independent Circuits	Supplier Device Package	Logic Type	Mounting Type	Circuit [custom]	Circuit [custom]	Package / Case	Voltage - Supply [Min]	Voltage - Supply [Max]
Texas Instruments 8512801RA	Non-Inverted Tri-State	23 ns	7.8 mA	7.8 mA	-55 °C	125 °C	1	20-CDIP	D-Type Transparent Latch	Through Hole	8	8	20-CDIP	2 V	6 V

Catalog

Octal D-type Transparent Latches With 3-State Outputs

Key Features

• Wide Operating Voltage Range from 2 V to 6 VHigh-Current 3-State Outputs Drive Bus Lines Directly up to 15 LSTTL LoadsLow Power Consumption: 80-µA Maximum ICCTypical tpd= 21 ns±6-mA Output Drive at 5 VLow Input Current: 1 µA (Maximum)Bus-Structured PinoutWide Operating Voltage Range from 2 V to 6 VHigh-Current 3-State Outputs Drive Bus Lines Directly up to 15 LSTTL LoadsLow Power Consumption: 80-µA Maximum ICCTypical tpd= 21 ns±6-mA Output Drive at 5 VLow Input Current: 1 µA (Maximum)Bus-Structured Pinout

Description

The SNx4HC573A devices are octal transparent D-type latches that feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. While the latch-enable (LE) input is high, the Q outputs respond to the data (D) inputs. When LE is low, the outputs are latched to retain the data that was set up. The SNx4HC573A devices are octal transparent D-type latches that feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. While the latch-enable (LE) input is high, the Q outputs respond to the data (D) inputs. When LE is low, the outputs are latched to retain the data that was set up.