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Technical Specifications
Parameters and characteristics for this part
| Specification | CD4516BPWR |
|---|---|
| Count Rate | 11 MHz |
| Direction | Up, Down |
| Logic Type | Binary Counter |
| Mounting Type | Surface Mount |
| Number of Bits per Element | 4 |
| Number of Elements | 1 |
| Operating Temperature [Max] | 125 °C |
| Operating Temperature [Min] | -55 °C |
| Package / Case | 16-TSSOP |
| Package / Case [x] | 0.173 in |
| Package / Case [y] | 4.4 mm |
| Reset | Asynchronous |
| Supplier Device Package | 16-TSSOP |
| Timing | Synchronous |
| Trigger Type | Positive Edge |
| Voltage - Supply [Max] | 18 V |
| Voltage - Supply [Min] | 3 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | Cut Tape (CT) | 1 | $ 0.82 | |
| 10 | $ 0.51 | |||
| 25 | $ 0.43 | |||
| 100 | $ 0.33 | |||
| 250 | $ 0.28 | |||
| 500 | $ 0.26 | |||
| 1000 | $ 0.23 | |||
| Digi-Reel® | 1 | $ 0.82 | ||
| 10 | $ 0.51 | |||
| 25 | $ 0.43 | |||
| 100 | $ 0.33 | |||
| 250 | $ 0.28 | |||
| 500 | $ 0.26 | |||
| 1000 | $ 0.23 | |||
| Tape & Reel (TR) | 2000 | $ 0.21 | ||
| 4000 | $ 0.19 | |||
| 6000 | $ 0.19 | |||
| 10000 | $ 0.18 | |||
| 14000 | $ 0.17 | |||
| 20000 | $ 0.17 | |||
| 50000 | $ 0.15 | |||
| Texas Instruments | LARGE T&R | 1 | $ 0.37 | |
| 100 | $ 0.25 | |||
| 250 | $ 0.19 | |||
| 1000 | $ 0.13 | |||
Description
General part information
CD4516B-MIL Series
CD4510B Presettable BCD Up/Down Counter and the CD4516 Presettable Binary Up/Down Counter consist of four synchronously clocked D-type flip-flops (with a gating structure to provide T-type flip-flop capability) connected as counters. These counters can be cleared by a high level on the RESET line, and can be preset to any binary number present on the jam inputs by a high level on the PRESET ENABLE line. The CD4510B will count out of non-BCD counter states in a maximum of two clock pulses in the up mode, and a maximum of four clock pulses in the down mode.
If the CARRY-IN input is held low, the counter advances up or down on each positive-going clock transition. Synchronous cascading is accomplished by connecting all clock inputs in parallel and connecting the CARRY-OUT of a less significant stage to the CARRY-IN of a more significant stage.
The CD4510B and CD4516B can be cascaded in the ripple mode by connecting the CARRY-OUT to the clock of the next stage. If the UP/DOWN input changes during a terminal count, the CARRY-OUT must be gated with the clock, and the UP/DOWN input must change while the clock is high. This method provides a clean clock signal to the subsequent counting stage. (See Fig.15).
Documents
Technical documentation and resources