
CDCVF2505IDRQ1
NRNDAUTOMOTIVE PLL CLOCK DRIVER FOR SYNCHRONIZATION, DRAM & GEN-PURPOSE APPS WITH SPREAD-SPECTRUM COMPAT
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CDCVF2505IDRQ1
NRNDAUTOMOTIVE PLL CLOCK DRIVER FOR SYNCHRONIZATION, DRAM & GEN-PURPOSE APPS WITH SPREAD-SPECTRUM COMPAT
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Technical Specifications
Parameters and characteristics for this part
| Specification | CDCVF2505IDRQ1 |
|---|---|
| Differential - Input:Output | False |
| Divider/Multiplier | False |
| Frequency - Max [Max] | 200 MHz |
| Grade | Automotive |
| Mounting Type | Surface Mount |
| Number of Circuits | 1 |
| Operating Temperature [Max] | 85 °C |
| Operating Temperature [Min] | -40 °C |
| Output | LVTTL |
| Package / Case | 8-SOIC |
| Package / Case [x] | 0.154 in |
| Package / Case [y] | 3.9 mm |
| PLL | Yes with Bypass |
| Qualification | AEC-Q100 |
| Ratio - Input:Output | 1:5 |
| Supplier Device Package | 8-SOIC |
| Type | PLL Clock Driver |
| Voltage - Supply [Max] | 3.6 V |
| Voltage - Supply [Min] | 3 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | Cut Tape (CT) | 1 | $ 4.00 | |
| Digi-Reel® | 1 | $ 4.00 | ||
| Tape & Reel (TR) | 2500 | $ 2.01 | ||
| 5000 | $ 1.93 | |||
| Texas Instruments | LARGE T&R | 1 | $ 3.50 | |
| 100 | $ 3.07 | |||
| 250 | $ 2.15 | |||
| 1000 | $ 1.74 | |||
Description
General part information
CDCVF2505-Q1 Series
The CDCVF2505 is a high-performance, low-skew, low-jitter, phase-lock loop (PLL) clock driver. It uses a PLL to precisely align, in both frequency and phase, the output clocks (1Y[0–3] and CLKOUT) to the input clock signal (CLKIN). The CDCVF2505 operates at 3.3 V. It also provides integrated series-damping resistors that make it ideal for driving point-to-point loads.
One bank of five outputs provides low-skew, low-jitter copies of CLKIN. Output duty cycles are adjusted to 50 percent, independent of duty cycle at CLKIN. The device automatically goes in power-down mode when no input signal is applied to CLKIN.
Unlike many products containing PLLs, the CDCVF2505 does not require an external RC network. The loop filter for the PLLs is included on-chip, minimizing component count, space, and cost.
Documents
Technical documentation and resources