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56-pin (DGV) package image
Integrated Circuits (ICs)

SN74ALVTH16821VR

Obsolete
Texas Instruments

2.5-V/3.3-V 20-BIT BUS-INTERFACE FLIP-FLOPS WITH 3-STATE OUTPUTS

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56-pin (DGV) package image
Integrated Circuits (ICs)

SN74ALVTH16821VR

Obsolete
Texas Instruments

2.5-V/3.3-V 20-BIT BUS-INTERFACE FLIP-FLOPS WITH 3-STATE OUTPUTS

Technical Specifications

Parameters and characteristics for this part

SpecificationSN74ALVTH16821VR
Clock Frequency150 MHz
Current - Output High, Low [custom]24 mA
Current - Output High, Low [custom]32 mA
Current - Output High, Low [custom]64 mA
Current - Output High, Low [custom]8 mA
Current - Quiescent (Iq)100 µA
FunctionStandard
Input Capacitance3.5 pF
Max Propagation Delay @ V, Max CL3.5 ns
Mounting TypeSurface Mount
Number of Bits per Element10
Number of Elements2
Operating Temperature [Max]85 °C
Operating Temperature [Min]-40 °C
Output TypeTri-State, Non-Inverted
Package / Case0.173 in
Package / Case56-TFSOP
Package / Case [y]4.4 mm
Supplier Device Package56-TVSOP
Trigger TypePositive Edge
TypeD-Type
Voltage - Supply [Max]2.7 V, 3.6 V
Voltage - Supply [Min]2.3 V, 3 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
Texas InstrumentsLARGE T&R 1$ 3.79
100$ 3.32
250$ 2.33
1000$ 1.88

Description

General part information

SN74ALVTH16821 Series

The 'ALVTH16821 devices are 20-bit bus-interface flip-flops with 3-state outputs designed for 2.5-V or 3.3-V VCCoperation, but with the capability to provide a TTL interface to a 5-V system environment.

The devices can be used as two 10-bit flip-flops or one 20-bit flip-flop. The 20-bit flip-flops are edge-triggered D-type flip-flops. On the positive transition of the clock (CLK), the flip-flops store the logic levels set up at the D inputs.

A buffered output-enable (OE\) input can be used to place the ten outputs in either a normal logic state (high or low level) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without need for interface or pullup components.