Zenode.ai Logo
Beta
PAP-64-TQFP Exp Pad Pkg
Integrated Circuits (ICs)

ADS5500IPAPR

Obsolete
Texas Instruments

IC ADC 14BIT PIPELINED 64HTQFP

Deep-Dive with AI

Search across all available documentation for this part.

PAP-64-TQFP Exp Pad Pkg
Integrated Circuits (ICs)

ADS5500IPAPR

Obsolete
Texas Instruments

IC ADC 14BIT PIPELINED 64HTQFP

Deep-Dive with AI

Technical Specifications

Parameters and characteristics for this part

SpecificationADS5500IPAPR
ArchitecturePipelined
ConfigurationS/H-ADC
Data InterfaceParallel
Input TypeDifferential
Mounting TypeSurface Mount
Number of A/D Converters1
Number of Bits14
Number of Inputs1
Operating Temperature [Max]85 °C
Operating Temperature [Min]-40 °C
Package / Case64-PowerTQFP
Ratio - S/H:ADC1:1
Reference TypeInternal
Sampling Rate (Per Second)125 M
Supplier Device Package64-HTQFP (10x10)
Voltage - Supply, Analog [Max]3.6 V
Voltage - Supply, Analog [Min]3 V
Voltage - Supply, Digital [Max]3.6 V
Voltage - Supply, Digital [Min]3 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$

Description

General part information

ADS5500-EP Series

The ADS5500-EP is a high-performance, 14-bit, 125 MSPS analog-to-digital converter (ADC). To provide a complete converter solution, it includes a high-bandwidth linear sample-and-hold stage (S&H) and internal reference. Designed for applications demanding the highest speed and highest dynamic performance in a small space, the ADS5500-EP has excellent power consumption of 780 mW at 3.3-V single-supply voltage. This allows an even higher system integration density. The provided internal reference simplifies system design requirements. A parallel CMOS-compatible output ensures seamless interfacing with common logic.

The ADS5500-EP is available in a 64-pin TQFP PowerPAD package and is specified over the full temperature range of –55°C to +125°C.

The ADS5500-EP is a high-performance, 14-bit, 125 MSPS analog-to-digital converter (ADC). To provide a complete converter solution, it includes a high-bandwidth linear sample-and-hold stage (S&H) and internal reference. Designed for applications demanding the highest speed and highest dynamic performance in a small space, the ADS5500-EP has excellent power consumption of 780 mW at 3.3-V single-supply voltage. This allows an even higher system integration density. The provided internal reference simplifies system design requirements. A parallel CMOS-compatible output ensures seamless interfacing with common logic.

Documents

Technical documentation and resources

No documents available