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Integrated Circuits (ICs)

DRA829JMTGBALFRQ1

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Texas Instruments

DUAL ARM CORTEX-A72, QUAD CORTEX-R5F, MULTI-CORE DSP, 8-PORT ETHERNET AND 4-PORT PCIE SWITCHES

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827-pin (ALF) package image
Integrated Circuits (ICs)

DRA829JMTGBALFRQ1

Active
Texas Instruments

DUAL ARM CORTEX-A72, QUAD CORTEX-R5F, MULTI-CORE DSP, 8-PORT ETHERNET AND 4-PORT PCIE SWITCHES

Technical Specifications

Parameters and characteristics for this part

SpecificationDRA829JMTGBALFRQ1
ArchitectureMCU, DSP, MPU
ConnectivitySPI, I3C, UART, MMC/SD/SDIO, I2C, USB, MCAN
Core ProcessorARM® Cortex®-R5F, C7x, ARM® Cortex®-A72, C66x
Number of I/O226
Operating Temperature [custom]-40 °C, 105 °C
Package / Case827-BFBGA, FCBGA
PeripheralsWDT, PWM, DMA
RAM Size1.5 MB
Speed2 GHz, 1.35 GHz, 1 GHz
Supplier Device Package827-FCBGA (24x24)

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyTape & Reel (TR) 250$ 90.07
Texas InstrumentsLARGE T&R 1$ 104.92
100$ 101.77
250$ 84.73
1000$ 78.89

Description

General part information

DRA829J-Q1 Series

DRA829 processors, based on the Arm®v8 64-bit architecture, provide advanced system integration to enable lower system costs of automotive and industrial applications. The integrated diagnostics and functional safety features are targeted to ASIL-B/C or SIL-2 certification/requirements. The integrated microcontroller (MCU) island eliminates the need for an external system MCU. The device features a Gigabit Ethernet switch and a PCIe hub which enables networking use cases that require heavy data bandwidth. Up to four Arm Cortex-R5F subsystems manage low level, timing critical processing tasks leaving the Arm Cortex-A72’s unencumbered for applications. A dual-core cluster configuration of Arm Cortex-A72 facilitates multi-OS applications with minimal need for a software hypervisor.

DRA829 processors, based on the Arm®v8 64-bit architecture, provide advanced system integration to enable lower system costs of automotive and industrial applications. The integrated diagnostics and functional safety features are targeted to ASIL-B/C or SIL-2 certification/requirements. The integrated microcontroller (MCU) island eliminates the need for an external system MCU. The device features a Gigabit Ethernet switch and a PCIe hub which enables networking use cases that require heavy data bandwidth. Up to four Arm Cortex-R5F subsystems manage low level, timing critical processing tasks leaving the Arm Cortex-A72’s unencumbered for applications. A dual-core cluster configuration of Arm Cortex-A72 facilitates multi-OS applications with minimal need for a software hypervisor.

Documents

Technical documentation and resources

Security Enablers on Jacinto™ 7 Processors

White paper

Jacinto7 AM6x/TDA4x/DRA8x Schematic Checklist (Rev. B)

Application note

Evolving automotive gateways for next-generation vehicles (Rev. B)

White paper

Jacinto™ 7 automotive processors

More literature

MMC SW Tuning Algorithm (Rev. A)

Application note

Leverage Jacinto 7 Processors Functional Safety Features for Automotive Designs (Rev. A)

Functional safety information

Jacinto 7 Display Subsystem Overview

Application note

J721E SDL TUV Certification

Certificate

Jacinto 7 EVM Quick Start Guide for TDA4VM and DRA829V Processors (Rev. A)

More literature

J721E DRA829/TDA4VM Processors Silicon Revision 2.0/1.1/1.0 (Rev. F)

Errata

OSPI Tuning Procedure

Application note

TDA4 Flashing Techniques

Application note

How to simplify your embedded edge AI application development

Technical article

DRA829_TDA4VM Report on the Safety Certificate - Industrial

Functional safety information

Jacinto™ 7 프로세서의 보안 구현 도구

White paper

Securing Arm-Based Application Processors (Rev. F)

White paper

UART Log Debug System on Jacinto 7 SoC

Application note

Using TSN Ethernet Features to Improve Timing in Industrial Ethernet Controllers

Application note

TPS65941213-Q1 and LP876411B4-Q1 PMIC User Guide for J721E, PDN-1A

User guide

Jacinto Functional Safety Enablers (Rev. A)

Functional safety information

SPI Enablement & Validation on TDA4 Family

Application note

TÜV SÜD Certificate for Functional Safety Software Development Process (Rev. C)

Functional safety information

Proof of Concept Enablement for Jacinto TDA4VM OpenVx Host on R5F MCU2_0

Application note

Jacinto7 HS Device Customer Return Process

Application note

Jacinto 7 LPDDR4 Board Design and Layout Guidelines (Rev. F)

Application note

J721E DDR Firewall Example

Application note

為下一代車輛開發的汽車閘道 (Rev. B)

White paper

Differenzierungsmöglichkeit durch MCU-Integration Prozessoren der Reihe Jacinto™

White paper

TPS65941212-Q1 and TPS65941111-Q1 PMIC User Guide for J721E, PDN-0B (Rev. B)

User guide

DRA829_TDA4VM Safety Certificate - Automotive

Functional safety information

Sicherheitsaktivierung auf Jacinto™ 7-Prozessoren

White paper

Making ADAS technology more accessible in vehicles

Technical article

Enabling MAC2MAC Feature on Jacinto7 Soc

Application note

Jacinto 7 Camera Capture and Imaging Subsystem

Application note

Dual-TDA4x System Solution

Application note

Debugging GPU Driver Issues on TDA4x and AM6x Devices

Application note

Jacinto 7 Thermal Management Guide - Software Strategies

Application note

Jacinto™ 7 프로세서의 MCU 통합으로 차별화 지원

White paper

J721E, J721S2, J7200, J784S4 MCAL TUV Certification

Functional safety information

Understanding TDA4VM or DRA829 Memory for Optimal Performance

Application note

DRA829 Processors datasheet (Rev. K)

Data sheet

Enabling Differentiation through MCU Integration on Jacinto™ 7 Processors

White paper

Jacinto7 AM6x, TDA4x, and DRA8x High-Speed Interface Design Guidelines (Rev. A)

Application note

DRA829_TDA4VM Safety Certificate - Industrial

Functional safety information

차세대 자동차를 위한 진화하는 차량용 게이트웨이 (Rev. B)

White paper

DRA829_TDA4VM Report on the Safety Certificate - Automotive

Functional safety information