Zenode.ai Logo
Beta
DRA829J-Q1

DRA829J-Q1 Series

Dual Arm Cortex-A72, quad Cortex-R5F, multi-core DSP, 8-port Ethernet and 4-port PCIe switches

Manufacturer: Texas Instruments

Catalog

Dual Arm Cortex-A72, quad Cortex-R5F, multi-core DSP, 8-port Ethernet and 4-port PCIe switches

Key Features

Processor cores:Dual 64-bit Arm Cortex-A72 microprocessor subsystem at up to 2.0GHz1MB shared L2 cache per dual-core Arm Cortex-A72 cluster32KB L1 DCache and 48KB L1 ICache per Cortex-A72 CoreSix Arm Cortex-R5F MCUs at up to 1.0GHz16K I-Cache, 16K D-Cache, 64K L2 TCMTwo Arm Cortex-R5F MCUs in isolated MCU subsystemFour Arm Cortex-R5F MCUs in general compute partitionDeep-learning Matrix Multiply Accelerator (MMA), up to 8 TOPS (8b) at 1.0 GHzC7x floating point, vector DSP, up to 1.0 GHz, 80 GFLOPS, 256 GOPSTwo C66x floating point DSP, up to 1.35 GHz, 40 GFLOPS, 160 GOPS3D GPU PowerVR Rogue 8XE GE8430, up to 750 MHz, 96 GFLOPS, 6 Gpix/secMemory subsystem:Up to 8MB of on-chip L3 RAM with ECC and coherencyECC error protectionShared coherent cacheSupports internal DMA engineExternal Memory Interface (EMIF) module with ECCSupports LPDDR4 memory typesSupports speeds up to 4266 MT/s32-bit data bus with inline ECC up to 14.9GB/sGeneral-Purpose Memory Controller (GPMC)512KB on-chip SRAM in MAIN domain, protected by ECCDisplay subsystem:One eDP/DP interface with Multi-Display Support (MST)HDCP1.4/HDCP2.2 high-bandwidth digital content protectionOne DSI TX (up to 2.5K)Up to two DPIVideo acceleration:Ultra-HD video, one (3840 × 2160p, 60 fps), or two (3840 × 2160p, 30 fps) H.264/H.265 decodeFull-HD video, four (1920 × 1080p, 60 fps), or eight (1920 × 1080p, 30 fps) H.264/H.265 decodeFull-HD video, one (1920 × 1080p, 60 fps), or up to three (1920 × 1080p, 30 fps) H.264 encodeFunctional Safety:Functional Safety-Complianttargeted (on select part numbers)Developed for functional safety applicationsDocumentation available to aid ISO 26262/IEC 61508 functional safety system design up to ASIL-D/SIL-3 targetedSystematic capability up to ASIL-D/SC-3 targetedHardware integrity up to ASIL-D/SIL-3 targeted for MCU DomainHardware integrity up to ASIL-B/SIL-2 targeted for Main DomainSafety-related certificationISO 26262 certification up to ASIL-D by TÜV SÜD plannedIEC 61508 certification up to SIL-3 by TÜV SÜD plannedAEC-Q100 qualified on part number variants ending in Q1Device security (on select part numbers):Secure boot with secure run-time supportCustomer programmable root key, up to RSA-4K or ECC-512Embedded hardware security moduleCrypto hardware accelerators – PKA with ECC, AES, SHA, RNG, DES and 3DESHigh speed serial interfaces:Two CSI2.0 4L RX plus one CSI2.0 4L TXIntegrated Ethernet switch supporting up to 8 external portsAll ports support 2.5Gb SGMIIAll ports support 1Gb SGMII/RGMIIAll ports support 100Mb RMIIAny two ports support QSGMII (using 4 internal ports per QSGMII)Up to four PCI-Express (PCIe) Gen3 controllersGen1 (2.5GT/s), Gen2 (5.0GT/s), and Gen3 (8.0GT/s) operation with auto-negotiationUp to two lanes per controllerTwo USB 3.0 dual-role device (DRD) subsystemTwo enhanced SuperSpeed Gen1 portsEach port supports Type-C switchingEach port independently configurable as USB host, USB peripheral, or USB DRDAutomotive interfaces:Sixteen Modular Controller Area Network (MCAN) modules with full CAN-FD supportAudio interfaces:Twelve Multichannel Audio Serial Port (MCASP) modulesFlash memory interfaces:Embedded MultiMediaCard interface ( eMMC™ 5.1)Universal Flash Storage (UFS 2.1) interface with two lanesTwo Secure Digital 3.0/Secure Digital Input Output 3.0 interfaces (SD3.0/SDIO3.0)Two simultaneous flash interfaces configured asOne OSPI and one QSPI flash interfacesor one HyperBus™ and one QSPI flash interfaceSystem-on-Chip (SoC) architecture:16-nm FinFET technology24 mm × 24 mm, 0.8-mm pitch, 827-pin FCBGA (ALF), enables IPC class 3 PCB routingTPS6594-Q1 Companion Power Management ICs (PMIC):Functional Safety support up to ASIL-DFlexible mapping to support different use casesProcessor cores:Dual 64-bit Arm Cortex-A72 microprocessor subsystem at up to 2.0GHz1MB shared L2 cache per dual-core Arm Cortex-A72 cluster32KB L1 DCache and 48KB L1 ICache per Cortex-A72 CoreSix Arm Cortex-R5F MCUs at up to 1.0GHz16K I-Cache, 16K D-Cache, 64K L2 TCMTwo Arm Cortex-R5F MCUs in isolated MCU subsystemFour Arm Cortex-R5F MCUs in general compute partitionDeep-learning Matrix Multiply Accelerator (MMA), up to 8 TOPS (8b) at 1.0 GHzC7x floating point, vector DSP, up to 1.0 GHz, 80 GFLOPS, 256 GOPSTwo C66x floating point DSP, up to 1.35 GHz, 40 GFLOPS, 160 GOPS3D GPU PowerVR Rogue 8XE GE8430, up to 750 MHz, 96 GFLOPS, 6 Gpix/secMemory subsystem:Up to 8MB of on-chip L3 RAM with ECC and coherencyECC error protectionShared coherent cacheSupports internal DMA engineExternal Memory Interface (EMIF) module with ECCSupports LPDDR4 memory typesSupports speeds up to 4266 MT/s32-bit data bus with inline ECC up to 14.9GB/sGeneral-Purpose Memory Controller (GPMC)512KB on-chip SRAM in MAIN domain, protected by ECCDisplay subsystem:One eDP/DP interface with Multi-Display Support (MST)HDCP1.4/HDCP2.2 high-bandwidth digital content protectionOne DSI TX (up to 2.5K)Up to two DPIVideo acceleration:Ultra-HD video, one (3840 × 2160p, 60 fps), or two (3840 × 2160p, 30 fps) H.264/H.265 decodeFull-HD video, four (1920 × 1080p, 60 fps), or eight (1920 × 1080p, 30 fps) H.264/H.265 decodeFull-HD video, one (1920 × 1080p, 60 fps), or up to three (1920 × 1080p, 30 fps) H.264 encodeFunctional Safety:Functional Safety-Complianttargeted (on select part numbers)Developed for functional safety applicationsDocumentation available to aid ISO 26262/IEC 61508 functional safety system design up to ASIL-D/SIL-3 targetedSystematic capability up to ASIL-D/SC-3 targetedHardware integrity up to ASIL-D/SIL-3 targeted for MCU DomainHardware integrity up to ASIL-B/SIL-2 targeted for Main DomainSafety-related certificationISO 26262 certification up to ASIL-D by TÜV SÜD plannedIEC 61508 certification up to SIL-3 by TÜV SÜD plannedAEC-Q100 qualified on part number variants ending in Q1Device security (on select part numbers):Secure boot with secure run-time supportCustomer programmable root key, up to RSA-4K or ECC-512Embedded hardware security moduleCrypto hardware accelerators – PKA with ECC, AES, SHA, RNG, DES and 3DESHigh speed serial interfaces:Two CSI2.0 4L RX plus one CSI2.0 4L TXIntegrated Ethernet switch supporting up to 8 external portsAll ports support 2.5Gb SGMIIAll ports support 1Gb SGMII/RGMIIAll ports support 100Mb RMIIAny two ports support QSGMII (using 4 internal ports per QSGMII)Up to four PCI-Express (PCIe) Gen3 controllersGen1 (2.5GT/s), Gen2 (5.0GT/s), and Gen3 (8.0GT/s) operation with auto-negotiationUp to two lanes per controllerTwo USB 3.0 dual-role device (DRD) subsystemTwo enhanced SuperSpeed Gen1 portsEach port supports Type-C switchingEach port independently configurable as USB host, USB peripheral, or USB DRDAutomotive interfaces:Sixteen Modular Controller Area Network (MCAN) modules with full CAN-FD supportAudio interfaces:Twelve Multichannel Audio Serial Port (MCASP) modulesFlash memory interfaces:Embedded MultiMediaCard interface ( eMMC™ 5.1)Universal Flash Storage (UFS 2.1) interface with two lanesTwo Secure Digital 3.0/Secure Digital Input Output 3.0 interfaces (SD3.0/SDIO3.0)Two simultaneous flash interfaces configured asOne OSPI and one QSPI flash interfacesor one HyperBus™ and one QSPI flash interfaceSystem-on-Chip (SoC) architecture:16-nm FinFET technology24 mm × 24 mm, 0.8-mm pitch, 827-pin FCBGA (ALF), enables IPC class 3 PCB routingTPS6594-Q1 Companion Power Management ICs (PMIC):Functional Safety support up to ASIL-DFlexible mapping to support different use cases

Description

AI
DRA829 processors, based on the Arm®v8 64-bit architecture, provide advanced system integration to enable lower system costs of automotive and industrial applications. The integrated diagnostics and functional safety features are targeted to ASIL-B/C or SIL-2 certification/requirements. The integrated microcontroller (MCU) island eliminates the need for an external system MCU. The device features a Gigabit Ethernet switch and a PCIe hub which enables networking use cases that require heavy data bandwidth. Up to four Arm Cortex-R5F subsystems manage low level, timing critical processing tasks leaving the Arm Cortex-A72’s unencumbered for applications. A dual-core cluster configuration of Arm Cortex-A72 facilitates multi-OS applications with minimal need for a software hypervisor. DRA829 processors, based on the Arm®v8 64-bit architecture, provide advanced system integration to enable lower system costs of automotive and industrial applications. The integrated diagnostics and functional safety features are targeted to ASIL-B/C or SIL-2 certification/requirements. The integrated microcontroller (MCU) island eliminates the need for an external system MCU. The device features a Gigabit Ethernet switch and a PCIe hub which enables networking use cases that require heavy data bandwidth. Up to four Arm Cortex-R5F subsystems manage low level, timing critical processing tasks leaving the Arm Cortex-A72’s unencumbered for applications. A dual-core cluster configuration of Arm Cortex-A72 facilitates multi-OS applications with minimal need for a software hypervisor.