Specification	SN74ALVCH16827DL

Current - Output High, Low [custom]	24 mA
Current - Output High, Low [custom]	24 mA
Logic Type	Buffer, Non-Inverting
Mounting Type	Surface Mount
Number of Bits per Element [custom]	10
Number of Elements	2
Operating Temperature [Max]	85 C
Operating Temperature [Min]	-40 ¯C
Output Type	3-State
Package / Case	56-BSSOP
Package / Case [x]	0.295 in
Package / Case [y]	7.5 mm
Supplier Device Package	56-SSOP
Voltage - Supply [Max]	3.6 V
Voltage - Supply [Min]	1.65 V

74ALVCH16827 Series

Part	Mounting Type	Logic Type	Number of Elements	Current - Output High, Low [custom]	Current - Output High, Low [custom]	Supplier Device Package	Operating Temperature [Max]	Operating Temperature [Min]	Package / Case [y]	Package / Case	Package / Case [x]	Voltage - Supply [Min]	Voltage - Supply [Max]	Output Type	Number of Bits per Element [custom]
Texas Instruments SN74ALVCH16827DGGR	Surface Mount	Buffer Non-Inverting	2	24 mA	24 mA	56-TSSOP	85 C	-40 ¯C	6.1 mm	56-TFSOP	0.24 in	1.65 V	3.6 V	3-State	10
Texas Instruments SN74ALVCH16827DLR	Surface Mount	Buffer Non-Inverting	2	24 mA	24 mA	56-SSOP	85 C	-40 ¯C	7.5 mm	56-BSSOP	0.295 in	1.65 V	3.6 V	3-State	10
Texas Instruments SN74ALVCH16827DL	Surface Mount	Buffer Non-Inverting	2	24 mA	24 mA	56-SSOP	85 C	-40 ¯C	7.5 mm	56-BSSOP	0.295 in	1.65 V	3.6 V	3-State	10

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

Distributor	Package	Quantity	$

Digikey	N/A	0	$ 2.12
		23343	$ 2.12
	Tube	400	$ 2.35
Texas Instruments	TUBE	1	$ 2.54
		100	$ 2.23
		250	$ 1.56
		1000	$ 1.26

Description

General part information

74ALVCH16827 Series

This 20-bit noninverting buffer/driver is designed for 1.65-V to 3.6-V VCCoperation.

The SN74ALVCH16827 is composed of two 10-bit sections with separate output-enable signals. For either 10-bit buffer section, the two output-enable (1OE1\ and 1OE2\ or 2OE1\ and 2OE2\) inputs must both be low for the corresponding Y outputs to be active. If either output-enable input is high, the outputs of that 10-bit buffer section are in the high-impedance state.

To ensure the high-impedance state during power up or power down, OE\ should be tied to VCCthrough a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

Documents

Technical documentation and resources

SN74ALVCH16827DL

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Technical Specifications

74ALVCH16827 Series

Pricing

Description

74ALVCH16827 Series

Documents

Datasheet

CMOS Power Consumption and CPD Calculation (Rev. B)

Standard Linear & Logic for PCs, Servers & Motherboards

TI SN74ALVC16835 Component Specification Analysis for PC100

Benefits & Issues of Migrating 5-V and 3.3-V Logic to Lower-Voltage Supplies (Rev. A)

Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A)

Input and Output Characteristics of Digital Integrated Circuits

Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)

An Overview of Bus-Hold Circuit and the Applications (Rev. B)

Logic Guide (Rev. AB)

TI IBIS File Creation, Validation, and Distribution Processes

Understanding Advanced Bus-Interface Products Design Guide

Migration From 3.3-V To 2.5-V Power Supplies For Logic Devices

Timing Differences of 10-pF Versus 50pF Loading

LOGIC Pocket Data Book (Rev. B)

Live Insertion

Semiconductor Packing Material Electrostatic Discharge (ESD) Protection

16-Bit Widebus Logic Families in 56-Ball, 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B)

ALVC Advanced Low-Voltage CMOS Including SSTL, HSTL, And ALB (Rev. B)

Logic Solutions for PC-100 SDRAM Registered DIMMs (Rev. A)

74ALVCH16827 Series