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32 VQFN
Integrated Circuits (ICs)

ADS61B23IRHBT

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Texas Instruments

12-BIT, 80-MSPS ANALOG-TO-DIGITAL CONVERTER (ADC)

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32 VQFN
Integrated Circuits (ICs)

ADS61B23IRHBT

Active
Texas Instruments

12-BIT, 80-MSPS ANALOG-TO-DIGITAL CONVERTER (ADC)

Technical Specifications

Parameters and characteristics for this part

SpecificationADS61B23IRHBT
ArchitecturePipelined
ConfigurationS/H-ADC
Data InterfaceLVDS - Parallel, Parallel
Input TypeDifferential
Mounting TypeSurface Mount
Number of A/D Converters1
Number of Bits12 bits
Number of Inputs1
Operating Temperature [Max]85 °C
Operating Temperature [Min]-40 °C
Package / Case32-VFQFN Exposed Pad
Ratio - S/H:ADC1:1
Reference TypeExternal, Internal
Sampling Rate (Per Second)80 M
Supplier Device Package32-VQFN (5x5)
Voltage - Supply, Analog [Max]3.6 V
Voltage - Supply, Analog [Min]3 V
Voltage - Supply, Digital [Max]3.6 V
Voltage - Supply, Digital [Min]1.65 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyCut Tape (CT) 1$ 47.63
Digi-Reel® 1$ 47.63
Tape & Reel (TR) 250$ 37.25
Texas InstrumentsSMALL T&R 1$ 40.30
100$ 35.83
250$ 29.45
1000$ 26.34

Description

General part information

ADS61B23 Series

ADS61B23 is a 12-bit A/D converter (ADC) with a maximum sampling frequency of 80 MSPS. It combines high performance and low power consumption in a compact 32-QFN package. The analog inputs use buffers to isolate the switching transients of the internal sample & hold from the external driving circuit. The buffered inputs present very low input capacitance (< 2pF) & wide bandwidth. This makes it easy to drive them at high input frequencies, compared to an ADC without the input buffers.

ADS61B23 has coarse and fine gain options that are used to improve SFDR performance at lower full-scale analog input ranges.

The digital data outputs are parallel CMOS or DDR LVDS (Double Data Rate). Several features exist to ease data capture—controls for output clock position and output buffer drive strength, plus LVDS current and internal termination programmability.