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Technical Specifications
Parameters and characteristics for this part
| Specification | PCI1520IPDV |
|---|---|
| Function | Controller |
| Interface | PCI |
| Operating Temperature [Max] | 85 °C |
| Operating Temperature [Min] | -40 °C |
| Package / Case | 208-LQFP |
| Protocol | PCI CardBus |
| Standards | PC Card 7.1 |
| Supplier Device Package | 208-QFP (28x28) |
| Voltage - Supply | 5 V, 3.3 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
Description
General part information
PCI1520-EP Series
The Texas Instruments PCI1520, a 208-terminal dual-slot CardBus controller designed to meet thePCI Bus Power Management Interface Specification for PCI to CardBus Bridges, is an ultralow-power high-performance PCI-to-CardBus controller that supports two independent card sockets compliant with thePC Card Standard(rev. 7.1). The PCI1520 provides features that make it the best choice for bridging between PCI and PC Cards in both notebook and desktop computers. The 1997PC Card Standardretains the 16-bit PC Card specification defined inPCI Local Bus Specificationand defines the new 32-bit PC Card, CardBus, capable of full 32-bit data transfers at 33 MHz. The PCI1520 supports any combination of 16-bit and CardBus PC Cards in the two sockets, powered at 5 V or 3.3 V, as required.
The PCI1520 is compliant with thePCI Local Bus Specification, and its PCI interface can act as either a PCI master device or a PCI slave device. The PCI bus mastering is initiated during CardBus PC Card bridging transactions. The PCI1520 is also compliant withPCI Bus Power Management Interface Specification(rev. 1.1).
All card signals are internally buffered to allow hot insertion and removal without external buffering. The PCI1520 is register-compatible with the Intel 82365SL-DF and 82365SL ExCA controllers. The PCI1520 internal data path logic allows the host to access 8-, 16-, and 32-bit cards using full 32-bit PCI cycles for maximum performance. Independent buffering and a pipeline architecture provide an unsurpassed performance level with sustained bursting. The PCI1520 can also be programmed to accept fast posted writes to improve system-bus utilization.
Documents
Technical documentation and resources