TMDS361BPAGR
Active3-GBPS 3-TO-1 HDMI/DVI MUX WITH ADAPTIVE EQUALIZATION AND ENHANCED JITTER PERFORMANCE
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TMDS361BPAGR
Active3-GBPS 3-TO-1 HDMI/DVI MUX WITH ADAPTIVE EQUALIZATION AND ENHANCED JITTER PERFORMANCE
Deep-Dive with AI
Technical Specifications
Parameters and characteristics for this part
| Specification | TMDS361BPAGR |
|---|---|
| Applications | Video Display |
| Control Interface | Logic, I2C, GPIO |
| Function | Switch |
| Mounting Type | Surface Mount |
| Package / Case | 64-TQFP |
| Standards | HDMI 1.3a |
| Supplier Device Package | 64-TQFP (10x10) |
| Voltage - Supply [Max] | 3.6 V |
| Voltage - Supply [Min] | 3 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | Cut Tape (CT) | 1 | $ 4.25 | |
| 10 | $ 3.82 | |||
| 25 | $ 3.61 | |||
| 100 | $ 3.13 | |||
| 250 | $ 2.97 | |||
| 500 | $ 2.66 | |||
| Digi-Reel® | 1 | $ 4.25 | ||
| 10 | $ 3.82 | |||
| 25 | $ 3.61 | |||
| 100 | $ 3.13 | |||
| 250 | $ 2.97 | |||
| 500 | $ 2.66 | |||
| Tape & Reel (TR) | 1500 | $ 2.25 | ||
| 3000 | $ 2.13 | |||
| Texas Instruments | LARGE T&R | 1 | $ 3.21 | |
| 100 | $ 2.81 | |||
| 250 | $ 1.97 | |||
| 1000 | $ 1.59 | |||
Description
General part information
TMDS361B Series
The TMDS361B is a three-port digital video interface (DVI) or high-definition multimedia interface (HDMI) switch that allows up to three DVI or HDMI ports to be switched to a single display terminal. Four TMDS channels, one hot-plug detector, and a digital display control (DDC) interface are supported on each port. Each TMDS channel supports signaling rates up to 3 Gbps to allow 1080p resolution in 16-bit color depth. TMDS361B is not intended for source side applications such as external switch boxes.
The TMDS361B provides an adaptive equalizer for different ranges of cable lengths. The equalizer automatically compensates for intersymbol interference [ISI] loss of an HDMI/DVI cable for up to 20 dB at 3 Gbps.
When any of the input ports are selected, the integrated terminations (50-Ω termination resistors pulled up to VCC) are switched on for the TMDS clock channel, the TMDS clock-detection circuit is enabled, and the DDC repeater is enabled. After a valid TMDS clock is detected, the integrated termination resistors for the data lines are enabled, and the output TMDS lines are enabled. When an input port is not selected, the integrated terminations are switched off, the TMDS receivers are disabled, and the DDC repeater is disabled. Clock-detection circuitry provides an automatic power-management feature, because if no valid TMDS clock is detected, the terminations on the input TMDS data lines are disconnected and the TMDS outputs are placed in a high-impedance state.
Documents
Technical documentation and resources