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Integrated Circuits (ICs)

SN74HCT244NSR

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Texas Instruments

EIGHT-CHANNEL 4.5-V TO 5.5-V BUFFERS WITH TTL-COMPATIBLE CMOS INPUTS AND TRI-STATE OUTPUTS

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SOP (NS)
Integrated Circuits (ICs)

SN74HCT244NSR

Active
Texas Instruments

EIGHT-CHANNEL 4.5-V TO 5.5-V BUFFERS WITH TTL-COMPATIBLE CMOS INPUTS AND TRI-STATE OUTPUTS

Technical Specifications

Parameters and characteristics for this part

SpecificationSN74HCT244NSR
Current - Output High, Low [custom]6 mA
Current - Output High, Low [custom]6 mA
Logic TypeBuffer, Non-Inverting
Mounting TypeSurface Mount
Number of Bits per Element4
Number of Elements2
Operating Temperature [Max]85 °C
Operating Temperature [Min]-40 °C
Output Type3-State
Package / Case20-SOIC
Package / Case0.209 "
Package / Case5.3 mm
Supplier Device Package20-SO
Voltage - Supply [Max]5.5 V
Voltage - Supply [Min]4.5 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyCut Tape (CT) 1$ 0.83
10$ 0.73
25$ 0.68
100$ 0.56
250$ 0.52
500$ 0.44
1000$ 0.35
Digi-Reel® 1$ 0.83
10$ 0.73
25$ 0.68
100$ 0.56
250$ 0.52
500$ 0.44
1000$ 0.35
Tape & Reel (TR) 2000$ 0.32
6000$ 0.30
10000$ 0.29
Texas InstrumentsLARGE T&R 1$ 0.61
100$ 0.41
250$ 0.32
1000$ 0.21

Description

General part information

SN74HCT244-Q1 Series

These octal buffers and line drivers are designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. The SNx4HCT244 devices are organized as two 4-bit buffers or drivers with separate output-enable (OE) inputs. When OE is low, the device passes non inverted data from the A inputs to the Y outputs. When OE is high, the outputs are in the high-impedance state.

These octal buffers and line drivers are designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. The SNx4HCT244 devices are organized as two 4-bit buffers or drivers with separate output-enable (OE) inputs. When OE is low, the device passes non inverted data from the A inputs to the Y outputs. When OE is high, the outputs are in the high-impedance state.