
AD9434BCPZRL7-500
Active1-CHANNEL SINGLE ADC PIPELINED 500MSPS 12-BIT LVDS 56-PIN LFCSP EP T/R
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AD9434BCPZRL7-500
Active1-CHANNEL SINGLE ADC PIPELINED 500MSPS 12-BIT LVDS 56-PIN LFCSP EP T/R
Technical Specifications
Parameters and characteristics for this part
| Specification | AD9434BCPZRL7-500 |
|---|---|
| Architecture | Pipelined |
| Configuration | ADC |
| Data Interface | LVDS - Parallel |
| Features | Internal Oscillator |
| Input Type | Differential |
| Mounting Type | Surface Mount |
| Number of A/D Converters | 1 |
| Number of Bits | 12 bits |
| Number of Inputs | 1 |
| Operating Temperature [Max] | 85 °C |
| Operating Temperature [Min] | -40 °C |
| Package / Case | 56-VFQFN Exposed Pad, CSP |
| Ratio - S/H:ADC | 0:1 |
| Reference Type | External, Internal |
| Sampling Rate (Per Second) | 500 M |
| Supplier Device Package | 56-LFCSP (8x8) |
| Voltage - Supply, Analog [Max] | 1.9 V |
| Voltage - Supply, Analog [Min] | 1.75 V |
| Voltage - Supply, Digital [Max] | 1.9 V |
| Voltage - Supply, Digital [Min] | 1.75 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | Bulk | 2 | $ 249.68 | |
Description
General part information
AD9434 Series
The AD9434 is a 12-bit monolithic sampling analog-to-digital converter (ADC) optimized for high performance, low power, and ease of use. The part operates at up to a 500 MSPS conversion rate and is optimized for outstanding dynamic performance in wideband carrier and broadband systems. All necessary functions, including a sample-and-hold and voltage reference, are included on the chip to provide a complete signal conversion solution. The VREF pin can be used to monitor the internal reference or provide an external voltage reference (external reference mode must be enabled through the SPI port).The ADC requires a 1.8 V analog voltage supply and a differential clock for full performance operation. The digital outputs are LVDS (ANSI-644) compatible and support twos complement, offset binary format, or Gray code. A data clock output is available for proper output data timing.Fabricated on an advanced BiCMOS process, the AD9434 is available in a 56-lead LFCSP, specified over the industrial temperature range (−40°C to +85°C). This part is protected under a U.S. patent.APPLICATIONSWireless and wired broadband communicationsCable reverse pathCommunications test equipmentRadar and satellite subsystemsPower amplifier linearizationPRODUCT HIGHLIGHTSHigh Performance.Maintains 65 dBFS SNR at 500 MSPS with a 250 MHz input.Low Power.Consumes only 660 mW at 500 MSPS.Ease of Use.LVDS output data and output clock signal allow interface to current FPGA technology. The on-chip reference and sample and hold provide flexibility in system design. Use of a single 1.8 V supply simplifies system power supply design.Serial Port Control.Standard serial port interface supports various product functions, such as data formatting, power-down, gain adjust, and output test pattern generation.The AD9434 is pin compatible with theAD9230, and can be substituted in many applications with minimal design changes.
Documents
Technical documentation and resources