Integrated Circuits (ICs)

SN74ALVCH16901DGGR

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18-BIT UNIVERSAL BUS TRANSCEIVER WITH PARITY GENERATORS/CHECKERS

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Search across all available documentation for this part.

DocumentsBenefits & Issues of Migrating 5-V and 3.3-V Logic to Lower-Voltage Supplies (Rev. A)Understanding Advanced Bus-Interface Products Design Guide +17

Integrated Circuits (ICs)

SN74ALVCH16901DGGR

Active

Texas Instruments

18-BIT UNIVERSAL BUS TRANSCEIVER WITH PARITY GENERATORS/CHECKERS

Deep-Dive with AI

DocumentsBenefits & Issues of Migrating 5-V and 3.3-V Logic to Lower-Voltage Supplies (Rev. A)Understanding Advanced Bus-Interface Products Design Guide +17

Specifications Series Pricing Description Documents

Technical Specifications

Parameters and characteristics for this part

Specification	SN74ALVCH16901DGGR

Current - Output High, Low	24 mA
Mounting Type	Surface Mount
Number of Circuits	18 Bit
Operating Temperature [Max]	85 °C
Operating Temperature [Min]	-40 °C
Package / Case	6.1 mm
Package / Case	64-TFSOP
Package / Case [x]	0.24 in
Supplier Device Package	64-TSSOP
Voltage - Supply [Max]	3.6 V
Voltage - Supply [Min]	1.65 V

SN74ALVCH16901 Series

18-bit universal bus transceiver with parity generators/checkers

Part	Package / Case [x]	Package / Case	Package / Case	Voltage - Supply [Min]	Voltage - Supply [Max]	Mounting Type	Current - Output High, Low	Supplier Device Package	Operating Temperature [Max]	Operating Temperature [Min]	Number of Circuits
Texas Instruments SN74ALVCH16901DGGR	0.24 in	6.1 mm	64-TFSOP	1.65 V	3.6 V	Surface Mount	24 mA	64-TSSOP	85 °C	-40 °C	18 Bit

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

Distributor	Package	Quantity	$

Digikey	Tape & Reel (TR)	2000	$ 2.29
Texas Instruments	LARGE T&R	1	$ 3.45
		100	$ 3.02
		250	$ 2.12
		1000	$ 1.71

Description

General part information

SN74ALVCH16901 Series

This 18-bit (dual-octal) noninverting registered transceiver is designed for 1.65-V to 3.6-V VCCoperation.

The SN74ALVCH16901 is a dual 9-bit to dual 9-bit parity transceiver with registers. The device can operate as a feed-through transceiver or it can generate/check parity from the two 8-bit data buses in either direction.

The SN74ALVCH16901 features independent clock (CLKAB or CLKBA), latch-enable (LEAB or LEBA), and dual 9-bit clock-enable (CLKENAB\ or CLKENBA\) inputs. It also provides parity-enable (SEL\) and parity-select (ODD/EVEN\) inputs and separate error-signal (ERRA\ or ERRB\) outputs for checking parity. The direction of data flow is controlled by OEAB\ and OEBA\. When SEL\ is low, the parity functions are enabled. When SEL\ is high, the parity functions are disabled and the device acts as an 18-bit registered transceiver.