DS90UH925ATRHSJQ1
UnknownLVDS SERIALIZER 2975MBPS 1.34V 48-PIN WQFN EP T/R AUTOMOTIVE AEC-Q100
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DS90UH925ATRHSJQ1
UnknownLVDS SERIALIZER 2975MBPS 1.34V 48-PIN WQFN EP T/R AUTOMOTIVE AEC-Q100
Deep-Dive with AI
Technical Specifications
Parameters and characteristics for this part
| Specification | DS90UH925ATRHSJQ1 |
|---|---|
| Data Rate | 2.975 Gbps |
| Function | Serializer |
| Grade | Automotive |
| Input Type | LVCMOS |
| Mounting Type | Surface Mount |
| Number of Outputs | 1 |
| Operating Temperature [Max] | 105 °C |
| Operating Temperature [Min] | -40 °C |
| Output Type | FPD-Link III, LVDS |
| Package / Case | 48-WFQFN Exposed Pad |
| Qualification | AEC-Q100 |
| Supplier Device Package | 48-WQFN (7x7) |
| Voltage - Supply [Max] | 3.6 V |
| Voltage - Supply [Min] | 3 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | Tape & Reel (TR) | 2500 | $ 7.28 | |
| Texas Instruments | LARGE T&R | 1 | $ 9.35 | |
| 100 | $ 8.17 | |||
| 250 | $ 6.30 | |||
| 1000 | $ 5.63 | |||
Description
General part information
DS90UH925AQ-Q1 Series
The DS90UH925AQ serializer, in conjunction with the DS90UH926Q deserializer, provides a solution for secure distribution of content-protected digital video within automotive entertainment systems. This chipset translates a parallel RGB Video Interface into a single pair high-speed serialized interface. The digital video data is protected using the industry standard HDCP copy protection scheme. The serial bus scheme, FPD-Link III, supports video and audio data transmission and full duplex control including I2C communication over a single differential link. Consolidation of video data and control over a single differential pair reduces the interconnect size and weight, while also eliminating skew issues and simplifying system design.
The DS90UH925AQ serializer embeds the clock, content protects the data payload, and level shifts the signals to high-speed low voltage differential signaling. Up to 24 RGB data bits are serialized along with three video control signals and up to two I2S data inputs.
EMI is minimized by the use of low voltage differential signaling, data scrambling and randomization and spread spectrum clocking compatibility.
Documents
Technical documentation and resources
