Deep-Dive with AI
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Technical Specifications
Parameters and characteristics for this part
| Specification | SN74ALS580BNSR |
|---|---|
| Circuit | 8:8 |
| Current - Output High, Low [custom] | 2.6 mA |
| Current - Output High, Low [custom] | 24 mA |
| Delay Time - Propagation | 6 ns |
| Independent Circuits | 1 |
| Logic Type | D-Type Transparent Latch |
| Mounting Type | Surface Mount |
| Operating Temperature [Max] | 70 °C |
| Operating Temperature [Min] | 0 °C |
| Output Type | Tri-State |
| Package / Case | 20-SOIC (0.209", 5.30mm Width) |
| Supplier Device Package | 20-SO |
| Voltage - Supply [Max] | 5.5 V |
| Voltage - Supply [Min] | 4.5 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | N/A | 0 | $ 2.06 | |
| 6048 | $ 2.06 | |||
| Tape & Reel (TR) | 2000 | $ 2.01 | ||
Description
General part information
74ALS580 Series
These octal D-type transparent latches feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.
While the latch-enable (LE) input is high, outputs (Q\) respond to the data (D) inputs. When LE is low, the outputs are latched to retain the data that was set up.
A buffered output-enableinput can be used to place the eight outputs in either a normal logic state (high or low) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and the increased drive provide the capability to drive bus lines without interface or pullup components.
Documents
Technical documentation and resources
No documents available
