Specification	SN74ALS580BN

Circuit	8:8
Current - Output High, Low [custom]	2.6 mA
Current - Output High, Low [custom]	24 mA
Delay Time - Propagation	6 ns
Independent Circuits	1
Logic Type	D-Type Transparent Latch
Mounting Type	Through Hole
Operating Temperature [Max]	70 °C
Operating Temperature [Min]	0 °C
Output Type	Tri-State
Package / Case	20-DIP (0.300", 7.62mm)
Supplier Device Package	20-PDIP
Voltage - Supply [Max]	5.5 V
Voltage - Supply [Min]	4.5 V

74ALS580 Series

Octal D-Type Transparent Latches With 3-State Outputs

Part	Independent Circuits	Supplier Device Package	Delay Time - Propagation	Logic Type	Package / Case	Circuit	Operating Temperature [Max]	Operating Temperature [Min]	Current - Output High, Low [custom]	Current - Output High, Low [custom]	Output Type	Mounting Type	Voltage - Supply [Max]	Voltage - Supply [Min]
Texas Instruments SN74ALS580BDWR	1	20-SOIC	6 ns	D-Type Transparent Latch	20-SOIC (0.295" 7.50mm Width)	8:8	70 °C	0 °C	2.6 mA	24 mA	Tri-State	Surface Mount	5.5 V	4.5 V
Texas Instruments SN74ALS580BNSR	1	20-SO	6 ns	D-Type Transparent Latch	20-SOIC (0.209" 5.30mm Width)	8:8	70 °C	0 °C	2.6 mA	24 mA	Tri-State	Surface Mount	5.5 V	4.5 V
Texas Instruments SN74ALS580BN3
Texas Instruments SN74ALS580BN	1	20-PDIP	6 ns	D-Type Transparent Latch	20-DIP (0.300" 7.62mm)	8:8	70 °C	0 °C	2.6 mA	24 mA	Tri-State	Through Hole	5.5 V	4.5 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

Distributor	Package	Quantity	$

Digikey	N/A	57	$ 5.73
		14933	$ 5.73
	Tube	1	$ 4.83
		20	$ 4.33
		40	$ 4.10
		100	$ 3.55
		260	$ 3.37
		500	$ 3.02
		1000	$ 2.55
		2500	$ 2.42
Texas Instruments	TUBE	1	$ 4.19
		100	$ 3.67
		250	$ 2.57
		1000	$ 2.07

Description

General part information

74ALS580 Series

These octal D-type transparent latches feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.

While the latch-enable (LE) input is high, outputs (Q\) respond to the data (D) inputs. When LE is low, the outputs are latched to retain the data that was set up.

A buffered output-enableinput can be used to place the eight outputs in either a normal logic state (high or low) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and the increased drive provide the capability to drive bus lines without interface or pullup components.

Documents

Technical documentation and resources

Octal D-Type Transparent Latches With 3-State Outputs datasheet

Data sheet