Specification	SN74LVTH16543DL

Current - Output High, Low [custom]	64 mA
Current - Output High, Low [custom]	32 mA
Mounting Type	Surface Mount
Number of Bits per Element	8
Number of Elements	2
Operating Temperature [Max]	85 °C
Operating Temperature [Min]	-40 °C
Output Type	3-State
Package / Case	0.295 in
Package / Case	56-BSSOP
Package / Case	7.5 mm
Supplier Device Package	56-SSOP
Voltage - Supply [Max]	3.6 V
Voltage - Supply [Min]	2.7 V

SN74LVTH16543 Series

3.3-V ABT 16-Bit Registered Transceivers With 3-State Outputs

Part	Output Type	Voltage - Supply [Min]	Voltage - Supply [Max]	Mounting Type	Operating Temperature [Max]	Operating Temperature [Min]	Package / Case	Package / Case	Package / Case	Number of Bits per Element	Current - Output High, Low [custom]	Current - Output High, Low [custom]	Supplier Device Package	Number of Elements
Texas Instruments SN74LVTH16543DL	3-State	2.7 V	3.6 V	Surface Mount	85 °C	-40 °C	0.295 in	56-BSSOP	7.5 mm	8	64 mA	32 mA	56-SSOP	2
Texas Instruments SN74LVTH16543DLR	3-State	2.7 V	3.6 V	Surface Mount	85 °C	-40 °C	0.295 in	56-BSSOP	7.5 mm	8	64 mA	32 mA	56-SSOP	2
Texas Instruments 74LVTH16543DGGRE4	3-State	2.7 V	3.6 V	Surface Mount	85 °C	-40 °C	0.24 in	56-TFSOP	6.1 mm	8	64 mA	32 mA	56-TSSOP	2

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

Distributor	Package	Quantity	$

Digikey	Tube	1	$ 2.74
		20	$ 2.46
		40	$ 2.32
		100	$ 1.98
		260	$ 1.86
		500	$ 1.62
		1000	$ 1.35
		2500	$ 1.25
		5000	$ 1.21
Texas Instruments	TUBE	1	$ 2.06
		100	$ 1.70
		250	$ 1.22
		1000	$ 0.92

Description

General part information

SN74LVTH16543 Series

The 'LVTH16543 devices are 16-bit registered transceivers designed for low-voltage (3.3-V) VCCoperation, but with the capability to provide a TTL interface to a 5-V system environment. These devices can be used as two 8-bit transceivers or one 16-bit transceiver. Separate latch-enable (LEAB\ or LEBA\) and output-enable (OEAB\ or OEBA\) inputs are provided for each register to permit independent control in either direction of data flow.

The A-to-B enable (CEAB\) input must be low to enter data from A or to output data from B. If CEAB\ is low and LEAB\ is low, the A-to-B latches are transparent; a subsequent low-to-high transition of LEAB\ puts the A latches in the storage mode. With CEAB\ and OEAB\ both low, the 3-state B outputs are active and reflect the data present at the output of the A latches. Data flow from B to A is similar but requires using the CEBA\, LEBA\, and OEBA\ inputs.

Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.